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Searched refs:CmpVal (Results 1 – 16 of 16) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp785 Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, in buildAtomicCmpXchgWithSuccess() argument
791 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchgWithSuccess()
806 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess()
813 Register CmpVal, Register NewVal, in buildAtomicCmpXchg() argument
818 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchg()
831 .addUse(CmpVal) in buildAtomicCmpXchg()
H A DLegalizerHelper.cpp3251 Register CmpVal = MI.getOperand(3).getReg(); in lower() local
3253 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal, in lower()
3255 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal); in lower()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2411 if (CmpVal == 0) { in getTestUnderMaskCond()
2417 if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) { in getTestUnderMaskCond()
2431 if (CmpVal == Mask) { in getTestUnderMaskCond()
2437 if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) { in getTestUnderMaskCond()
2443 if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) { in getTestUnderMaskCond()
2451 if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) { in getTestUnderMaskCond()
2457 if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) { in getTestUnderMaskCond()
2516 CmpVal += 1; in adjustForTestUnderMask()
2521 MaskVal = -(CmpVal & -CmpVal); in adjustForTestUnderMask()
2535 ((CmpVal >> ShiftVal) << ShiftVal) == CmpVal && in adjustForTestUnderMask()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h1141 Register Addr, Register CmpVal, Register NewVal,
1159 Register CmpVal, Register NewVal,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h468 Value *AlignedAddr, Value *CmpVal,
H A DRISCVISelLowering.cpp8858 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
8863 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); in emitMaskedAtomicCmpXchgIntrinsic()
8872 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2576 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg() local
2582 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg()
2585 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
4099 Register CmpVal; in legalizeBufferAtomic() local
4102 CmpVal = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
4137 MIB.addReg(CmpVal); in legalizeBufferAtomic()
H A DAMDGPUISelDAGToDAG.cpp2458 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP() local
2463 SDValue Ops[] = {CmpVal, VAddr, SRsrc, SOffset, Offset, CPol, in SelectATOMIC_CMP_SWAP()
2476 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP() local
2478 SDValue Ops[] = {CmpVal, SRsrc, SOffset, Offset, CPol, Mem->getChain()}; in SelectATOMIC_CMP_SWAP()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h892 Value *AlignedAddr, Value *CmpVal,
H A DPPCISelLowering.cpp17564 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
17573 Value *CmpLo = Builder.CreateTrunc(CmpVal, Int64Ty, "cmp_lo"); in emitMaskedAtomicCmpXchgIntrinsic()
17575 Builder.CreateTrunc(Builder.CreateLShr(CmpVal, 64), Int64Ty, "cmp_hi"); in emitMaskedAtomicCmpXchgIntrinsic()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp425 double CmpVal = IsUnsigned ? -(double)Limit * 2.0 : -(double)Limit; in LowerFPToInt() local
466 .addFPImm(cast<ConstantFP>(ConstantFP::get(Ty, CmpVal))); in LowerFPToInt()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp4401 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt); in foldICmpEquality() local
4402 return new ICmpInst(NewPred, Xor, Builder.getInt(CmpVal)); in foldICmpEquality()
5287 unsigned CmpVal = CI->countTrailingZeros(); in foldICmpUsingKnownBits() local
5289 return new ICmpInst(NewPred, X, ConstantInt::get(X->getType(), CmpVal)); in foldICmpUsingKnownBits()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DAddressSanitizer.cpp1758 Value *CmpVal = Constant::getNullValue(ShadowTy); in instrumentAddress() local
1762 Value *Cmp = IRB.CreateICmpNE(ShadowValue, CmpVal); in instrumentAddress()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1922 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1906 Register CmpVal = MI.getOperand(2).getReg(); in emitAtomicCmpSwapPartword() local
1984 .addReg(CmpVal).addImm(MaskImm); in emitAtomicCmpSwapPartword()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp5550 static bool isUndefOrEqual(int Val, int CmpVal) { in isUndefOrEqual() argument
5551 return ((Val == SM_SentinelUndef) || (Val == CmpVal)); in isUndefOrEqual()
5556 static bool isUndefOrEqual(ArrayRef<int> Mask, int CmpVal) { in isUndefOrEqual() argument
5557 return llvm::all_of(Mask, [CmpVal](int M) { in isUndefOrEqual()
5558 return (M == SM_SentinelUndef) || (M == CmpVal); in isUndefOrEqual()
42723 const APInt &CmpVal = CmpConstant->getAPIntValue(); in combineSetCCMOVMSK() local
42727 assert(CmpBits == CmpVal.getBitWidth() && "Value size mismatch"); in combineSetCCMOVMSK()
42744 bool IsAnyOf = CmpOpcode == X86ISD::CMP && CmpVal.isNullValue(); in combineSetCCMOVMSK()
42746 CmpVal.isMask(NumElts); in combineSetCCMOVMSK()