2392                                      uint64_t Mask, uint64_t CmpVal,  in getTestUnderMaskCond()  argument
2411   if (CmpVal == 0) {  in getTestUnderMaskCond()
2417   if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) {  in getTestUnderMaskCond()
2423   if (EffectivelyUnsigned && CmpVal < Low) {  in getTestUnderMaskCond()
2431   if (CmpVal == Mask) {  in getTestUnderMaskCond()
2437   if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) {  in getTestUnderMaskCond()
2443   if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) {  in getTestUnderMaskCond()
2451   if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) {  in getTestUnderMaskCond()
2457   if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) {  in getTestUnderMaskCond()
2467     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low)  in getTestUnderMaskCond()
2469     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == Low)  in getTestUnderMaskCond()
2471     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == High)  in getTestUnderMaskCond()
2473     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == High)  in getTestUnderMaskCond()
2489   uint64_t CmpVal = ConstOp1->getZExtValue();  in adjustForTestUnderMask()  local
2514       if (CmpVal == uint64_t(-1))  in adjustForTestUnderMask()
2516       CmpVal += 1;  in adjustForTestUnderMask()
2521     MaskVal = -(CmpVal & -CmpVal);  in adjustForTestUnderMask()
2535       ((CmpVal >> ShiftVal) << ShiftVal) == CmpVal &&  in adjustForTestUnderMask()
2538                                         CmpVal >> ShiftVal,  in adjustForTestUnderMask()
2546              ((CmpVal << ShiftVal) >> ShiftVal) == CmpVal &&  in adjustForTestUnderMask()
2549                                                CmpVal << ShiftVal,  in adjustForTestUnderMask()
2554     NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal,  in adjustForTestUnderMask()
4057   SDValue CmpVal = Node->getOperand(2);  in lowerATOMIC_CMP_SWAP()  local
4068     SDValue Ops[] = { ChainIn, Addr, CmpVal, SwapVal };  in lowerATOMIC_CMP_SWAP()
4102   SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift,  in lowerATOMIC_CMP_SWAP()
7622   Register CmpVal = MI.getOperand(3).getReg();  in emitAtomicCmpSwapW()  local
7690     .addReg(Dest).addReg(CmpVal);  in emitAtomicCmpSwapW()