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Searched refs:ArgLocs (Results 1 – 25 of 34) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp322 SmallVector<CCValAssign, 16> ArgLocs; in lowerReturn() local
325 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn()
336 if (!handleAssignments(RetHandler, RetInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerReturn()
374 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
375 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments()
391 if (!handleAssignments(Handler, ArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerFormalArguments()
486 SmallVector<CCValAssign, 8> ArgLocs; in lowerCall() local
495 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall()
510 if (!handleAssignments(ArgHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerCall()
544 SmallVector<CCValAssign, 8> ArgLocs; in lowerCall() local
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H A DMipsISelLowering.cpp3163 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
3165 CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, *DAG.getContext(), in LowerCall()
3256 for (unsigned i = 0, e = ArgLocs.size(), OutIdx = 0; i != e; ++i, ++OutIdx) { in LowerCall()
3258 CCValAssign &VA = ArgLocs[i]; in LowerCall()
3302 Register LocRegHigh = ArgLocs[++i].getLocReg(); in LowerCall()
3626 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
3627 MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
3644 for (unsigned i = 0, e = ArgLocs.size(), InsIdx = 0; i != e; ++i, ++InsIdx) { in LowerFormalArguments()
3645 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
3692 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments()
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H A DMipsFastISel.cpp1140 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local
1141 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1152 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in processCallArgs()
1153 CCValAssign &VA = ArgLocs[i]; in processCallArgs()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp261 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local
263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
506 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArgumentsKernel() local
591 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
592 CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments()
719 if (!handleAssignments(Handler, SplitArgs, CCInfo, ArgLocs, B)) in lowerFormalArguments()
1182 SmallVector<CCValAssign, 16> ArgLocs; in lowerTailCall() local
1183 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerTailCall()
1204 if (!handleAssignments(Handler, OutArgs, CCInfo, ArgLocs, MIRBuilder)) in lowerTailCall()
1308 SmallVector<CCValAssign, 16> ArgLocs; in lowerCall() local
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp237 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
238 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
261 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
262 CCValAssign &VA = ArgLocs[i]; in LowerCall()
455 SmallVector<CCValAssign, 16> ArgLocs; in LowerCallArguments() local
456 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCallArguments()
478 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCallArguments()
479 CCValAssign &VA = ArgLocs[i]; in LowerCallArguments()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp521 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
560 if (!ArgLocs.back().isMemLoc()) in LowerCall()
591 CCValAssign &VA = ArgLocs[i]; in LowerCall()
670 CCValAssign &VA = ArgLocs[i]; in LowerCall()
878 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
887 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
1202 SmallVector<CCValAssign, 16> ArgLocs; in IsEligibleForTailCallOptimization() local
1207 if (!ArgLocs[i].isRegLoc()) in IsEligibleForTailCallOptimization()
1232 SmallVector<CCValAssign, 16> ArgLocs; in IsEligibleForTailCallOptimization() local
1245 CCValAssign &VA = ArgLocs[i]; in IsEligibleForTailCallOptimization()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp315 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
316 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
319 for (auto &VA : ArgLocs) { in LowerFormalArguments()
393 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
394 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
418 e = std::min(static_cast<unsigned>(ArgLocs.size()), MaxArgs); in LowerCall()
420 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp524 SmallVector<CCValAssign, 16> ArgLocs; in determineAndHandleAssignments() local
526 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, F.getContext()); in determineAndHandleAssignments()
530 return handleAssignments(Handler, Args, CCInfo, ArgLocs, MIRBuilder, in determineAndHandleAssignments()
606 SmallVectorImpl<CCValAssign> &ArgLocs, in handleAssignments() argument
617 assert(j < ArgLocs.size() && "Skipped too many arg locs"); in handleAssignments()
618 CCValAssign &VA = ArgLocs[j]; in handleAssignments()
623 Handler.assignCustomValue(Args[i], makeArrayRef(ArgLocs).slice(j)); in handleAssignments()
659 assert((j + (NumParts - 1)) < ArgLocs.size() && in handleAssignments()
672 VA = ArgLocs[j + Part]; in handleAssignments()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp456 SmallVectorImpl<CCValAssign> &ArgLocs, in AnalyzeArguments() argument
627 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
628 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
630 AnalyzeArguments(CCInfo, ArgLocs, Ins); in LowerCCCArguments()
638 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
639 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
706 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
810 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
813 AnalyzeArguments(CCInfo, ArgLocs, Outs); in LowerCCCCallTo()
826 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCCallTo()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp390 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32() local
400 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32()
583 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_64() local
592 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_64()
732 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_32() local
786 CCValAssign &VA = ArgLocs[i]; in LowerCall_32()
1048 const CCValAssign &VA = ArgLocs[i]; in fixupVariableFloatArgs()
1086 ArgLocs[i] = NewVA; in fixupVariableFloatArgs()
1103 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_64() local
1137 const CCValAssign &VA = ArgLocs[i]; in LowerCall_64()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1023 SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo) { in analyzeArguments() argument
1143 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
1144 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
1151 analyzeArguments(nullptr, &MF.getFunction(), &DL, Ins, ArgLocs, CCInfo); in LowerFormalArguments()
1155 for (CCValAssign &VA : ArgLocs) { in LowerFormalArguments()
1252 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
1253 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
1276 analyzeArguments(&CLI, F, &DAG.getDataLayout(), Outs, ArgLocs, CCInfo); in LowerCall()
1289 for (AI = 0, AE = ArgLocs.size(); AI != AE; ++AI) { in LowerCall()
1290 CCValAssign &VA = ArgLocs[AI]; in LowerCall()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp447 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
448 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
456 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
457 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
603 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
604 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
657 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) { in LowerCCCCallTo()
658 CCValAssign &VA = ArgLocs[I]; in LowerCCCCallTo()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h397 SmallVectorImpl<CCValAssign> &ArgLocs,
406 const SmallVectorImpl<CCValAssign> &ArgLocs,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1114 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
1115 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
1141 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCCallTo()
1142 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo()
1269 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
1270 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
1294 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
1296 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp405 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
406 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
414 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
415 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
499 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments()
549 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
550 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
638 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
639 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1880 SmallVector<CCValAssign, 16> ArgLocs; in ProcessCallArgs() local
1881 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs()
1887 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs()
1888 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs()
1902 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1937 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs()
1938 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs()
1986 CCValAssign &NextVA = ArgLocs[++i]; in ProcessCallArgs()
H A DARMISelLowering.cpp2338 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
2400 CCValAssign &VA = ArgLocs[i]; in LowerCall()
2459 VA = ArgLocs[++i]; // skip ahead to next loc in LowerCall()
2975 SmallVector<CCValAssign, 16> ArgLocs; in IsEligibleForTailCallOptimization() local
2987 CCValAssign &VA = ArgLocs[i]; in IsEligibleForTailCallOptimization()
3000 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
3003 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
3005 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
4375 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
4400 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1380 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local
1381 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1390 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in processCallArgs()
1391 CCValAssign &VA = ArgLocs[I]; in processCallArgs()
1428 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in processCallArgs()
1429 CCValAssign &VA = ArgLocs[I]; in processCallArgs()
H A DPPCISelLowering.cpp3994 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32SVR4() local
4008 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32SVR4()
5768 CCValAssign &VA = ArgLocs[i]; in LowerCall_32SVR4()
6889 CCValAssign &VA = ArgLocs[I++]; in LowerFormalArguments_AIX()
6934 assert(I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() && in LowerFormalArguments_AIX()
6936 VA = ArgLocs[I++]; in LowerFormalArguments_AIX()
6956 if (I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom()) { in LowerFormalArguments_AIX()
7259 if (ArgLocs[I].isMemLoc()) { in LowerCall_AIX()
7316 CCValAssign &VA = ArgLocs[I++]; in LowerCall_AIX()
7354 assert(ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() && in LowerCall_AIX()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp429 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
430 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, *DAG.getContext(), in LowerCall()
445 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
446 CCValAssign &VA = ArgLocs[i]; in LowerCall()
468 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
469 CCValAssign &VA = ArgLocs[i]; in LowerCall()
791 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
792 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, in LowerFormalArguments()
828 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
829 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp474 SmallVector<CCValAssign, 16> ArgLocs; in handleMustTailForwardedRegisters() local
475 CCState CCInfo(F.getCallingConv(), /*IsVarArg=*/true, MF, ArgLocs, in handleMustTailForwardedRegisters()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp998 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
999 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
1014 CCInfo.addLoc(CCValAssign::getMem(ArgLocs.size(), VT.getSimpleVT(), in LowerCall()
1032 assert(ArgLocs[ValNo].getValNo() == ValNo && in LowerCall()
1034 unsigned Offset = ArgLocs[ValNo++].getLocMemOffset(); in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h586 const SmallVector<CCValAssign, 16> &ArgLocs) const;
H A DRISCVISelLowering.cpp7679 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
7680 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
7689 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
7690 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
7713 CCValAssign &PartVA = ArgLocs[i + 1]; in LowerFormalArguments()
7798 const SmallVector<CCValAssign, 16> &ArgLocs) const { in isEligibleForTailCallOptimization()
7826 for (auto &VA : ArgLocs) in isEligibleForTailCallOptimization()
7891 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
7892 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
7944 for (unsigned i = 0, j = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1438 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
1444 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in LowerFormalArguments()
1446 CCValAssign &VA = ArgLocs[I]; in LowerFormalArguments()
1512 CCValAssign &PartVA = ArgLocs[I + 1]; in LowerFormalArguments()
1572 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in canUseSiblingCall()
1573 CCValAssign &VA = ArgLocs[I]; in canUseSiblingCall()
1611 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
1612 SystemZCCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, Ctx); in LowerCall()
1617 if (IsTailCall && !canUseSiblingCall(ArgCCInfo, ArgLocs, Outs)) in LowerCall()
1631 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in LowerCall()
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