3994   SmallVector<CCValAssign, 16> ArgLocs;  in LowerFormalArguments_32SVR4()  local
3995   PPCCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,  in LowerFormalArguments_32SVR4()
4007   for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {  in LowerFormalArguments_32SVR4()
4008     CCValAssign &VA = ArgLocs[i];  in LowerFormalArguments_32SVR4()
4059         unsigned RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC);  in LowerFormalArguments_32SVR4()
5681   SmallVector<CCValAssign, 16> ArgLocs;  in LowerCall_32SVR4()  local
5682   PPCCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());  in LowerCall_32SVR4()
5765   for (unsigned i = 0, RealArgIdx = 0, j = 0, e = ArgLocs.size();  in LowerCall_32SVR4()
5768     CCValAssign &VA = ArgLocs[i];  in LowerCall_32SVR4()
5826         RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),  in LowerCall_32SVR4()
6874   SmallVector<CCValAssign, 16> ArgLocs;  in LowerFormalArguments_AIX()  local
6878   AIXCCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());  in LowerFormalArguments_AIX()
6888   for (size_t I = 0, End = ArgLocs.size(); I != End; /* No increment here */) {  in LowerFormalArguments_AIX()
6889     CCValAssign &VA = ArgLocs[I++];  in LowerFormalArguments_AIX()
6934         assert(I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerFormalArguments_AIX()
6936         VA = ArgLocs[I++];  in LowerFormalArguments_AIX()
6956       if (I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom()) {  in LowerFormalArguments_AIX()
7059       for (; Offset != StackSize && ArgLocs[I].isRegLoc();  in LowerFormalArguments_AIX()
7061         assert(ArgLocs[I].getValNo() == VA.getValNo() &&  in LowerFormalArguments_AIX()
7064         const CCValAssign RL = ArgLocs[I++];  in LowerFormalArguments_AIX()
7070         assert(ArgLocs[I].getValNo() == VA.getValNo() &&  in LowerFormalArguments_AIX()
7072         assert(ArgLocs[I].isMemLoc() && "Expected MemLoc for remaining bytes.");  in LowerFormalArguments_AIX()
7177   SmallVector<CCValAssign, 16> ArgLocs;  in LowerCall_AIX()  local
7178   AIXCCState CCInfo(CFlags.CallConv, CFlags.IsVarArg, MF, ArgLocs,  in LowerCall_AIX()
7216   for (unsigned I = 0, E = ArgLocs.size(); I != E;) {  in LowerCall_AIX()
7217     const unsigned ValNo = ArgLocs[I].getValNo();  in LowerCall_AIX()
7242       while (LoadOffset + PtrByteSize <= ByValSize && ArgLocs[I].isRegLoc()) {  in LowerCall_AIX()
7246         const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7256       assert(ArgLocs[I].getValNo() == ValNo &&  in LowerCall_AIX()
7259       if (ArgLocs[I].isMemLoc()) {  in LowerCall_AIX()
7261         const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7311       const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7316     CCValAssign &VA = ArgLocs[I++];  in LowerCall_AIX()
7354         assert(ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerCall_AIX()
7356         CCValAssign RegVA = ArgLocs[I++];  in LowerCall_AIX()
7373       if (I != E && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerCall_AIX()
7374           ArgLocs[I].getValNo() == OriginalValNo) {  in LowerCall_AIX()
7430         CCValAssign &PeekArg = ArgLocs[I];  in LowerCall_AIX()
7433           CCValAssign &GPR2 = ArgLocs[I++];  in LowerCall_AIX()