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Searched refs:And (Results 1 – 25 of 355) sorted by relevance

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/freebsd-13.1/sys/contrib/libsodium/packaging/nuget/
H A Dpackage.gsl144 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
149 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
154 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
161 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
166 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
171 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
176 … And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov20…
207 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
213 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
219 …And ('$\(PlatformToolset)' == '$(package.platformtoolset)' Or '$\(PlatformToolset)' == 'CTP_Nov201…
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMaskingPreRA.cpp132 auto *And = in optimizeVcndVcmpPair() local
134 if (!And || And->getOpcode() != AndOpc || in optimizeVcndVcmpPair()
135 !And->getOperand(1).isReg() || !And->getOperand(2).isReg()) in optimizeVcndVcmpPair()
138 MachineOperand *AndCC = &And->getOperand(1); in optimizeVcndVcmpPair()
142 AndCC = &And->getOperand(2); in optimizeVcndVcmpPair()
152 Cmp->getParent() != And->getParent()) in optimizeVcndVcmpPair()
186 << *And); in optimizeVcndVcmpPair()
188 LIS->RemoveMachineInstrFromMaps(*And); in optimizeVcndVcmpPair()
190 BuildMI(MBB, *And, And->getDebugLoc(), TII->get(Andn2Opc), in optimizeVcndVcmpPair()
191 And->getOperand(0).getReg()) in optimizeVcndVcmpPair()
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H A DSILowerControlFlow.cpp233 MachineInstr *And = in emitIf() local
238 setImpSCCDefDead(*And, true); in emitIf()
273 LIS->ReplaceMachineInstrInMaps(MI, *And); in emitIf()
314 MachineInstr *And = BuildMI(MBB, ElsePt, DL, TII->get(AndOpc), DstReg) in emitElse() local
319 LIS->InsertMachineInstrInMaps(*And); in emitElse()
374 MachineInstr *And = nullptr, *Or = nullptr; in emitIfBreak() local
377 And = BuildMI(MBB, &MI, DL, TII->get(AndOpc), AndReg) in emitIfBreak()
391 if (And) in emitIfBreak()
392 LIS->InsertMachineInstrInMaps(*And); in emitIfBreak()
H A DAMDGPUAtomicOptimizer.cpp127 case AtomicRMWInst::And: in visitAtomicRMWInst()
184 Op = AtomicRMWInst::And; in visitIntrinsicInst()
260 case AtomicRMWInst::And: in buildNonAtomicBinOp()
261 return B.CreateBinOp(Instruction::And, LHS, RHS); in buildNonAtomicBinOp()
438 case AtomicRMWInst::And: in getIdentityValueForAtomicOp()
570 case AtomicRMWInst::And: in optimizeAtomic()
667 case AtomicRMWInst::And: in optimizeAtomic()
/freebsd-13.1/tests/sys/geom/class/uzip/etalon/
H A Detalon.txt13 And the mome raths outgrabe.
23 And stood awhile in thought.
25 And, as in uffish thought he stood,
28 And burbled as it came!
30 One, two! One, two! And through and through
35 "And, has thou slain the Jabberwock?
43 And the mome raths outgrabe.
/freebsd-13.1/contrib/llvm-project/clang/lib/Analysis/
H A DThreadSafetyLogical.cpp44 case LExpr::And: in implies()
49 return RNeg ? RightOrOperator(cast<And>(RHS)) in implies()
50 : RightAndOperator(cast<And>(RHS)); in implies()
69 case LExpr::And: in implies()
74 return LNeg ? LeftAndOperator(cast<And>(LHS)) in implies()
75 : LeftOrOperator(cast<And>(LHS)); in implies()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DGuardUtils.cpp87 auto *And = dyn_cast<Instruction>(Cond); in parseWidenableBranch() local
88 if (!And) in parseWidenableBranch()
94 WC = &And->getOperandUse(0); in parseWidenableBranch()
95 C = &And->getOperandUse(1); in parseWidenableBranch()
101 WC = &And->getOperandUse(1); in parseWidenableBranch()
102 C = &And->getOperandUse(0); in parseWidenableBranch()
/freebsd-13.1/contrib/llvm-project/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyLogical.h25 And, enumerator
68 class And : public BinOp {
70 And(LExpr *LHS, LExpr *RHS) : BinOp(LHS, RHS, LExpr::And) {} in And() function
72 static bool classof(const LExpr *E) { return E->kind() == LExpr::And; } in classof()
/freebsd-13.1/usr.bin/diff/tests/
H A Dunified_p.out7 - * And another bla
8 + * And another bla
10 - * And yet another
H A Dunified_9999.out7 - * And another bla
8 + * And another bla
10 - * And yet another
H A Dgroup-format.out5 * And another bla
7 * And another bla
11 * And yet another
H A Dunified_c9999.out8 ! * And another bla
10 ! * And yet another
24 ! * And another bla
H A Dsimple_p.out8 ! * And another bla
10 ! * And yet another
23 ! * And another bla
H A Difdef.out5 * And another bla
7 * And another bla
11 * And yet another
H A Dsimple_i.out2 < * And another bla
4 > * And another bla
H A Dinput_c1.in4 * And another bla
6 * And yet another
/freebsd-13.1/contrib/kyua/doc/
H A Dmanbuild_test.sh59 And nothing more.
65 And nothing more.
76 And nothing more.
82 And nothing more.
119 And done!
135 And done!
/freebsd-13.1/contrib/file/magic/Magdir/
H A Dxilinx21 # And then 'b'
35 # And length of data
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPatternsHVX.td336 def: OpR_RR_pat<V6_vand, And, VecI8, HVI8>;
337 def: OpR_RR_pat<V6_vand, And, VecI16, HVI16>;
338 def: OpR_RR_pat<V6_vand, And, VecI32, HVI32>;
569 def: OpR_RR_pat<V6_pred_and, And, VecQ8, HQ8>;
570 def: OpR_RR_pat<V6_pred_and, And, VecQ16, HQ16>;
571 def: OpR_RR_pat<V6_pred_and, And, VecQ32, HQ32>;
579 def: OpR_RR_pat<V6_pred_and_n, VNot2<And, qnot>, VecQ8, HQ8>;
580 def: OpR_RR_pat<V6_pred_and_n, VNot2<And, qnot>, VecQ16, HQ16>;
581 def: OpR_RR_pat<V6_pred_and_n, VNot2<And, qnot>, VecQ32, HQ32>;
596 def: AccRRR_pat<V6_veqb_and, And, seteq, HQ8, HVI8, HVI8>;
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/freebsd-13.1/sys/contrib/device-tree/Bindings/clock/
H A Dnvidia,tegra210-car.txt1 NVIDIA Tegra210 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
H A Dnvidia,tegra30-car.txt1 NVIDIA Tegra30 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
H A Dnvidia,tegra20-car.txt1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
H A Dnvidia,tegra114-car.txt1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMIPatternMatch.h130 template <typename... Preds> struct And { struct
138 struct And<Pred, Preds...> : And<Preds...> { argument
140 And(Pred &&p, Preds &&... preds)
141 : And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {
145 return P.match(MRI, src) && And<Preds...>::match(MRI, src);
167 template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) {
168 return And<Preds...>(std::forward<Preds>(preds)...);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp1753 match(And->getOperand(1), m_One())) in foldICmpAndConstConst()
1762 if (!And->hasOneUse()) in foldICmpAndConstConst()
1816 match(And->getOperand(1), m_One())) { in foldICmpAndConstConst()
1818 Value *Or = And->getOperand(0); in foldICmpAndConstConst()
1823 if (And->hasOneUse()) in foldICmpAndConstConst()
1874 Value *X = And->getOperand(0); in foldICmpAndConstant()
1875 Value *Y = And->getOperand(1); in foldICmpAndConstant()
2166 return new ICmpInst(Pred, And, LShrC); in foldICmpShlConstant()
2194 Value *And = in foldICmpShlConstant() local
2969 case Instruction::And: in foldICmpInstWithConstant()
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