Searched refs:AllocationOrder (Results 1 – 8 of 8) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AllocationOrder.h | 30 class LLVM_LIBRARY_VISIBILITY AllocationOrder { 45 const AllocationOrder &AO; 49 Iterator(const AllocationOrder &AO, int Pos) : AO(AO), Pos(Pos) {} in Iterator() 84 static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM, 90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() function
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| H A D | AllocationOrder.cpp | 29 AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM, in create() 52 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
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| H A D | RegAllocGreedy.cpp | 464 const AllocationOrder &Order); 488 MCRegister tryAssign(LiveInterval&, AllocationOrder&, 491 MCRegister tryEvict(LiveInterval &, AllocationOrder &, 494 MCRegister tryRegionSplit(LiveInterval &, AllocationOrder &, 498 AllocationOrder &Order, 513 unsigned tryBlockSplit(LiveInterval&, AllocationOrder&, 515 unsigned tryInstructionSplit(LiveInterval&, AllocationOrder&, 517 unsigned tryLocalSplit(LiveInterval&, AllocationOrder&, 519 unsigned trySplit(LiveInterval&, AllocationOrder&, 819 AllocationOrder &Order, in tryAssign() [all …]
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| H A D | RegisterScavenging.cpp | 361 const LiveRegUnits &LiveOut, ArrayRef<MCPhysReg> AllocationOrder, in findSurvivorBackwards() argument 383 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() 401 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() 575 ArrayRef<MCPhysReg> AllocationOrder = RC.getRawAllocationOrder(MF); in scavengeRegisterBackwards() local 577 findSurvivorBackwards(*MRI, MBBI, To, LiveUnits, AllocationOrder, in scavengeRegisterBackwards()
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| H A D | RegAllocFast.cpp | 791 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtReg() local 792 for (MCPhysReg PhysReg : AllocationOrder) { in allocVirtReg() 844 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtRegUndef() local 845 assert(!AllocationOrder.empty() && "Allocation order must not be empty"); in allocVirtRegUndef() 846 PhysReg = AllocationOrder[0]; in allocVirtRegUndef() 975 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in useVirtReg() local 976 setPhysReg(MI, MO, *AllocationOrder.begin()); in useVirtReg()
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| H A D | RegAllocBasic.cpp | 270 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix); in selectOrSplit()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 517 // Make AllocationOrder as similar as G8RC's to avoid potential spilling.
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| /freebsd-13.1/lib/clang/libllvm/ |
| H A D | Makefile | 172 SRCS_MIN+= CodeGen/AllocationOrder.cpp
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