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Searched refs:AVR (Results 1 – 25 of 44) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRELFObjectWriter.cpp81 case AVR::fixup_32: in getRelocType()
87 case AVR::fixup_16: in getRelocType()
89 case AVR::fixup_16_pm: in getRelocType()
115 case AVR::fixup_call: in getRelocType()
117 case AVR::fixup_ldi: in getRelocType()
119 case AVR::fixup_6: in getRelocType()
131 case AVR::fixup_8: in getRelocType()
133 case AVR::fixup_8_lo8: in getRelocType()
135 case AVR::fixup_8_hi8: in getRelocType()
139 case AVR::fixup_diff8: in getRelocType()
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H A DAVRELFStreamer.cpp16 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
18 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
20 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
22 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
24 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
26 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
28 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
30 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
32 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet()
34 else if (Features[AVR::ELFArchAVR6]) in getEFlagsForFeatureSet()
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H A DAVRAsmBackend.cpp253 case AVR::fixup_7_pcrel: in adjustFixupValue()
259 case AVR::fixup_call: in adjustFixupValue()
262 case AVR::fixup_ldi: in adjustFixupValue()
265 case AVR::fixup_lo8_ldi: in adjustFixupValue()
316 case AVR::fixup_16: in adjustFixupValue()
321 case AVR::fixup_16_pm: in adjustFixupValue()
328 case AVR::fixup_6: in adjustFixupValue()
331 case AVR::fixup_6_adiw: in adjustFixupValue()
335 case AVR::fixup_port5: in adjustFixupValue()
339 case AVR::fixup_port6: in adjustFixupValue()
[all …]
H A DAVRMCExpr.cpp150 AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind; in getFixupKind()
154 Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi; in getFixupKind()
157 Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi; in getFixupKind()
160 Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi; in getFixupKind()
163 Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi; in getFixupKind()
167 Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm; in getFixupKind()
170 Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm; in getFixupKind()
173 Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm; in getFixupKind()
177 Kind = AVR::fixup_16_pm; in getFixupKind()
180 Kind = AVR::fixup_lo8_ldi_gs; in getFixupKind()
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H A DAVRInstPrinter.cpp44 case AVR::LDRdPtr: in printInst()
45 case AVR::LDRdPtrPi: in printInst()
46 case AVR::LDRdPtrPd: in printInst()
51 if (Opcode == AVR::LDRdPtrPd) in printInst()
56 if (Opcode == AVR::LDRdPtrPi) in printInst()
59 case AVR::STPtrRr: in printInst()
65 case AVR::STPtrPiRr: in printInst()
66 case AVR::STPtrPdRr: in printInst()
69 if (Opcode == AVR::STPtrPdRr) in printInst()
74 if (Opcode == AVR::STPtrPiRr) in printInst()
[all …]
H A DAVRMCCodeEmitter.cpp80 bool IsPredec = Opcode == AVR::LDRdPtrPd || Opcode == AVR::STPtrPdRr; in loadStorePostEncoder()
81 bool IsPostinc = Opcode == AVR::LDRdPtrPi || Opcode == AVR::STPtrPiRr; in loadStorePostEncoder()
91 template <AVR::Fixups Fixup>
109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget()
122 case AVR::R27R26: return 0x03; // X: 0b11 in encodeLDSTPtrReg()
123 case AVR::R29R28: return 0x02; // Y: 0b10 in encodeLDSTPtrReg()
124 case AVR::R31R30: return 0x00; // Z: 0b00 in encodeLDSTPtrReg()
147 case AVR::R31R30: in encodeMemri()
150 case AVR::R29R28: in encodeMemri()
180 template <AVR::Fixups Fixup, unsigned Offset>
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H A DAVRMCCodeEmitter.h50 template <AVR::Fixups Fixup>
72 template <AVR::Fixups Fixup, unsigned Offset>
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRFrameLowering.cpp75 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
109 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
134 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
151 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in restoreStatusRegister()
155 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0); in restoreStatusRegister()
215 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
324 (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr; in fixStackStores()
362 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
369 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP) in eliminateCallFramePseudoInstr()
392 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
[all …]
H A DAVRInstrInfo.cpp39 : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI() {} in AVRInstrInfo()
221 case AVR::BREQk: in getCondFromBranchOpc()
223 case AVR::BRNEk: in getCondFromBranchOpc()
225 case AVR::BRSHk: in getCondFromBranchOpc()
227 case AVR::BRLOk: in getCondFromBranchOpc()
229 case AVR::BRMIk: in getCondFromBranchOpc()
231 case AVR::BRPLk: in getCondFromBranchOpc()
233 case AVR::BRGEk: in getCondFromBranchOpc()
235 case AVR::BRLTk: in getCondFromBranchOpc()
508 case AVR::JMPk: in getBranchDestBlock()
[all …]
H A DAVRRegisterInfo.cpp60 Reserved.set(AVR::R0); in getReservedRegs()
61 Reserved.set(AVR::R1); in getReservedRegs()
107 if ((Opcode != AVR::SUBIWRdK) && (Opcode != AVR::ADIWRdK)) { in foldFrameOffset()
119 case AVR::SUBIWRdK: in foldFrameOffset()
122 case AVR::ADIWRdK: in foldFrameOffset()
183 case AVR::R25R24: in eliminateFrameIndex()
184 case AVR::R27R26: in eliminateFrameIndex()
212 unsigned AddOpc = AVR::ADIWRdK, SubOpc = AVR::SBIWRdK; in eliminateFrameIndex()
226 BuildMI(MBB, II, dl, TII.get(AVR::INRdA), AVR::R0).addImm(0x3f); in eliminateFrameIndex()
256 return AVR::R28; in getFrameRegister()
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H A DAVRExpandPseudoInsts.cpp272 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
277 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
282 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
334 return expandArith(AVR::SBCRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
902 unsigned LoadOpcode = (Width == 8) ? AVR::LDRdPtr : AVR::LDWRdPtr; in expandAtomicArithmeticOp()
903 unsigned StoreOpcode = (Width == 8) ? AVR::STPtrRr : AVR::STWPtrRr; in expandAtomicArithmeticOp()
2126 EXPAND(AVR::COMWRd); in expandMI()
2127 EXPAND(AVR::NEGWRd); in expandMI()
2159 EXPAND(AVR::INWRdA); in expandMI()
2176 EXPAND(AVR::SEXT); in expandMI()
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H A DAVRISelLowering.cpp1002 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
1003 AVR::R19, AVR::R18, AVR::R17, AVR::R16, AVR::R15, AVR::R14,
1004 AVR::R13, AVR::R12, AVR::R11, AVR::R10, AVR::R9, AVR::R8};
1006 AVR::R26R25, AVR::R25R24, AVR::R24R23, AVR::R23R22,
1007 AVR::R22R21, AVR::R21R20, AVR::R20R19, AVR::R19R18,
1008 AVR::R18R17, AVR::R17R16, AVR::R16R15, AVR::R15R14,
1009 AVR::R14R13, AVR::R13R12, AVR::R12R11, AVR::R11R10,
1010 AVR::R10R9, AVR::R9R8};
1529 case AVR::Lsl8: in insertShift()
1650 return (SrcReg == AVR::R0 || SrcReg == AVR::R1); in isCopyMulResult()
[all …]
H A DAVRISelDAGToDAG.cpp144 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
152 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
185 Opcode = AVR::LPMRdZPi; in selectIndexedProgMemLoad()
192 Opcode = AVR::LPMWRdZPi; in selectIndexedProgMemLoad()
262 if (RI.getRegClass(Reg) != &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand()
314 CurDAG->SelectNodeTo(N, AVR::FRMIDX, in select()
334 if (!RN || (RN->getReg() != AVR::SP)) { in select()
344 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr; in select()
359 if (!AVR::isProgramMemoryAccess(LD)) { in select()
378 SDValue RegZ = CurDAG->getRegister(AVR::R31R30, MVT::i16); in select()
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H A DAVRRegisterInfo.td23 let Namespace = "AVR";
29 let Namespace = "AVR" in
35 let Namespace = "AVR" in {
124 def GPR8 : RegisterClass<"AVR", [i8], 8,
136 def GPR8lo : RegisterClass<"AVR", [i8], 8,
142 def LD8 : RegisterClass<"AVR", [i8], 8,
153 def LD8lo : RegisterClass<"AVR", [i8], 8,
159 def DREGS : RegisterClass<"AVR", [i16], 8,
175 def DREGSlo : RegisterClass<"AVR", [i16], 8,
222 def DLDREGS : RegisterClass<"AVR", [i16], 8,
[all …]
H A DAVRRelaxMemOperations.cpp88 bool AVRRelaxMem::relax<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) { in relax()
99 buildMI(MBB, MBBI, AVR::PUSHWRr) in relax()
103 buildMI(MBB, MBBI, AVR::SBCIWRdK) in relax()
110 buildMI(MBB, MBBI, AVR::STWPtrRr) in relax()
115 buildMI(MBB, MBBI, AVR::POPWRd) in relax()
133 RELAX(AVR::STDWPtrQRr); in runOnInstruction()
H A DAVR.td1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
8 // This is the top level entry point for the AVR target.
18 // AVR Device Definitions
73 def AVR : Target {
H A DAVRCallingConv.td1 //===-- AVRCallingConv.td - Calling Conventions for AVR ----*- tablegen -*-===//
8 // This describes the calling conventions for AVR architecture.
13 // AVR Return Value Calling Convention
24 // AVR Argument Calling Conventions
H A DREADME.md1 # AVR backend
3 This experimental backend is for the 8-bit Atmel [AVR](https://en.wikipedia.org/wiki/Atmel_AVR) mic…
7 * [Unresolved bugs](https://llvm.org/bugs/buglist.cgi?product=libraries&component=Backend%3A%20AVR&…
H A DAVRAsmPrinter.cpp124 Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi in PrintAsmOperand()
125 : AVR::sub_lo); in PrintAsmOperand()
154 if (MI->getOperand(OpNum).getReg() == AVR::R31R30) { in PrintAsmMemoryOperand()
157 assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 && in PrintAsmMemoryOperand()
186 bool IsProgMem = GV->getAddressSpace() == AVR::ProgramMemory; in lowerConstant()
H A DAVRInstrFormats.td1 //===-- AVRInstrInfo.td - AVR Instruction Formats ----------*- tablegen -*-===//
9 // AVR Instruction Format Definitions.
13 // A generic AVR instruction.
16 let Namespace = "AVR";
26 /// A 16-bit AVR instruction.
35 /// a 32-bit AVR instruction.
45 // Pseudo instructions are not real AVR instructions. The DAG stores
46 // pseudo instructions which are replaced by real AVR instructions by
H A DAVRTargetObjectFile.cpp33 if (AVR::isProgramMemoryAddress(GO) && !GO->hasSection() && Kind.isReadOnly()) in SelectSectionForGlobal()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp61 AVR::R0, AVR::R1, AVR::R2, AVR::R3,
62 AVR::R4, AVR::R5, AVR::R6, AVR::R7,
63 AVR::R8, AVR::R9, AVR::R10, AVR::R11,
64 AVR::R12, AVR::R13, AVR::R14, AVR::R15,
65 AVR::R16, AVR::R17, AVR::R18, AVR::R19,
66 AVR::R20, AVR::R21, AVR::R22, AVR::R23,
67 AVR::R24, AVR::R25, AVR::R26, AVR::R27,
68 AVR::R28, AVR::R29, AVR::R30, AVR::R31,
183 Inst.addOperand(MCOperand::createReg(AVR::R31R30)); in decodeFLPMX()
/freebsd-13.1/contrib/llvm-project/lld/ELF/Arch/
H A DAVR.cpp43 class AVR final : public TargetInfo { class
45 AVR();
54 AVR::AVR() { noneRel = R_AVR_NONE; } in AVR() function in AVR
56 RelExpr AVR::getRelExpr(RelType type, const Symbol &s, in getRelExpr()
98 void AVR::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { in relocate()
223 static AVR target; in getAVRTargetInfo()
231 uint32_t AVR::calcEFlags() const { in calcEFlags()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp344 if (RegNum == AVR::NoRegister) { in parseRegisterName()
347 if (RegNum == AVR::NoRegister) { in parseRegisterName()
357 if (RegNum == AVR::NoRegister) in parseRegisterName()
364 int RegNum = AVR::NoRegister; in parseRegister()
378 if (RegNum == AVR::NoRegister && RestoreOnFailure) { in parseRegister()
392 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand()
567 if (RegNo == AVR::NoRegister) in parseMemriOperand()
593 return (RegNo == AVR::NoRegister); in ParseRegister()
603 if (RegNo == AVR::NoRegister) in tryParseRegister()
726 if (RegNum != AVR::NoRegister) { in validateTargetOperandClass()
[all …]
/freebsd-13.1/sys/contrib/device-tree/Bindings/powerpc/4xx/
H A Dakebono.txt44 1.d) The AVR node
46 The Akebono board has an Atmel AVR microprocessor attached to the I2C
52 - reg : should contain the I2C bus address for the AVR.

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