Lines Matching refs:AVR
63 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue()
71 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr)) in emitPrologue()
72 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
75 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
78 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
79 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
82 .addReg(AVR::R0, RegState::Define) in emitPrologue()
83 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
84 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
86 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
87 .addReg(AVR::R1, RegState::Define) in emitPrologue()
88 .addReg(AVR::R1, RegState::Kill) in emitPrologue()
89 .addReg(AVR::R1, RegState::Kill) in emitPrologue()
104 (MBBI->getOpcode() == AVR::PUSHRr || MBBI->getOpcode() == AVR::PUSHWRr)) { in emitPrologue()
109 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
110 .addReg(AVR::SP) in emitPrologue()
116 I->addLiveIn(AVR::R29R28); in emitPrologue()
124 unsigned Opcode = (isUInt<6>(FrameSize)) ? AVR::SBIWRdK : AVR::SUBIWRdK; in emitPrologue()
126 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitPrologue()
127 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
134 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
135 .addReg(AVR::R29R28) in emitPrologue()
151 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in restoreStatusRegister()
152 BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr)) in restoreStatusRegister()
154 .addReg(AVR::R0, RegState::Kill); in restoreStatusRegister()
155 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0); in restoreStatusRegister()
190 if (Opc != AVR::POPRd && Opc != AVR::POPWRd && !PI->isTerminator()) { in emitEpilogue()
201 Opcode = AVR::ADIWRdK; in emitEpilogue()
203 Opcode = AVR::SUBIWRdK; in emitEpilogue()
208 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitEpilogue()
209 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
215 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
216 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
266 BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr)) in spillCalleeSavedRegisters()
295 BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg); in restoreCalleeSavedRegisters()
313 if (Opcode != AVR::STDSPQRr && Opcode != AVR::STDWSPQRr) { in fixStackStores()
318 assert(MI.getOperand(0).getReg() == AVR::SP && in fixStackStores()
324 (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr; in fixStackStores()
343 fixStackStores(MBB, MI, TII, AVR::R29R28); in eliminateCallFramePseudoInstr()
362 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
364 MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30) in eliminateCallFramePseudoInstr()
365 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
369 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP) in eliminateCallFramePseudoInstr()
370 .addReg(AVR::R31R30); in eliminateCallFramePseudoInstr()
374 fixStackStores(MBB, MI, TII, AVR::R31R30); in eliminateCallFramePseudoInstr()
385 addOpcode = AVR::ADIWRdK; in eliminateCallFramePseudoInstr()
387 addOpcode = AVR::SUBIWRdK; in eliminateCallFramePseudoInstr()
392 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
394 MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(addOpcode), AVR::R31R30) in eliminateCallFramePseudoInstr()
395 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
399 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP) in eliminateCallFramePseudoInstr()
400 .addReg(AVR::R31R30, RegState::Kill); in eliminateCallFramePseudoInstr()
414 SavedRegs.set(AVR::R29); in determineCalleeSaves()
415 SavedRegs.set(AVR::R28); in determineCalleeSaves()
457 if ((Opcode != AVR::LDDRdPtrQ) && (Opcode != AVR::LDDWRdPtrQ) && in runOnMachineFunction()
458 (Opcode != AVR::STDPtrQRr) && (Opcode != AVR::STDWPtrQRr)) { in runOnMachineFunction()
507 MF.getRegInfo().createVirtualRegister(&AVR::DREGSRegClass); in runOnMachineFunction()
511 BuildMI(EntryMBB, MBBI, DL, TII.get(AVR::COPY), SPCopy).addReg(AVR::SP); in runOnMachineFunction()
519 BuildMI(MBB, MBBI, DL, TII.get(AVR::COPY), AVR::SP) in runOnMachineFunction()