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Searched refs:AMDGPUTargetLowering (Results 1 – 11 of 11) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp61 AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM, in AMDGPUTargetLowering() function in AMDGPUTargetLowering
862 SDValue AMDGPUTargetLowering::getNegatedExpression( in getNegatedExpression()
886 bool AMDGPUTargetLowering::isFAbsFree(EVT VT) const { in isFAbsFree()
894 bool AMDGPUTargetLowering::isFNegFree(EVT VT) const { in isFNegFree()
1172 SDValue AMDGPUTargetLowering::LowerReturn( in LowerReturn()
1278 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, in LowerOperation()
1822 void AMDGPUTargetLowering::LowerUDIVREM64(SDValue Op, in LowerUDIVREM64()
2037 SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op, in LowerUDIVREM()
2092 SDValue AMDGPUTargetLowering::LowerSDIVREM(SDValue Op, in LowerSDIVREM()
2881 AMDGPUTargetLowering::numBitsSigned(Op, DAG) < 24; in isI24()
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H A DAMDGPUCallLowering.h21 class AMDGPUTargetLowering; variable
41 AMDGPUCallLowering(const AMDGPUTargetLowering &TLI);
H A DAMDGPUTargetTransformInfo.h27 class AMDGPUTargetLowering; variable
232 const AMDGPUTargetLowering *TLI;
239 const AMDGPUTargetLowering *getTLI() const { return TLI; } in getTLI()
H A DR600ISelLowering.h24 class R600TargetLowering final : public AMDGPUTargetLowering {
H A DAMDGPUISelLowering.h27 class AMDGPUTargetLowering : public TargetLowering {
143 AMDGPUTargetLowering(const TargetMachine &TM, const AMDGPUSubtarget &STI);
H A DR600ISelLowering.cpp30 : AMDGPUTargetLowering(TM, STI), Subtarget(&STI), Gen(STI.getGeneration()) { in R600TargetLowering()
291 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB); in EmitInstrWithCustomInserter()
451 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); in LowerOperation()
635 AMDGPUTargetLowering::ReplaceNodeResults(N, Results, DAG); in ReplaceNodeResults()
724 return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG); in LowerGlobalAddress()
1873 if (SDValue Ret = AMDGPUTargetLowering::PerformDAGCombine(N, DCI)) in PerformDAGCombine()
1977 return AMDGPUTargetLowering::PerformDAGCombine(N, DCI); in PerformDAGCombine()
H A DSIISelLowering.h30 class SITargetLowering final : public AMDGPUTargetLowering {
H A DAMDGPUISelDAGToDAG.cpp1725 N = AMDGPUTargetLowering::stripBitcast(SDValue(N,0)).getNode(); in findMemSDNode()
1731 dyn_cast<MemSDNode>(AMDGPUTargetLowering::stripBitcast(V))) in findMemSDNode()
3090 const AMDGPUTargetLowering& Lowering = in PostprocessISelDAG()
3091 *static_cast<const AMDGPUTargetLowering*>(getTargetLowering()); in PostprocessISelDAG()
H A DSIISelLowering.cpp77 : AMDGPUTargetLowering(TM, STI), in SITargetLowering()
2563 return AMDGPUTargetLowering::LowerReturn(Chain, CallConv, isVarArg, Outs, in LowerReturn()
3368 return AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(Op, DAG); in LowerDYNAMIC_STACKALLOC()
4369 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB); in EmitInstrWithCustomInserter()
4544 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); in LowerOperation()
5769 return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG); in LowerGlobalAddress()
9477 return AMDGPUTargetLowering::performRcpCombine(N, DCI); in performRcpCombine()
10916 return AMDGPUTargetLowering::PerformDAGCombine(N, DCI); in PerformDAGCombine()
12073 return AMDGPUTargetLowering::isKnownNeverNaNForTargetNode(Op, DAG, in isKnownNeverNaNForTargetNode()
12154 return AMDGPUTargetLowering::shouldExpandAtomicRMWInIR(RMW); in shouldExpandAtomicRMWInIR()
H A DAMDGPUCallLowering.cpp235 AMDGPUCallLowering::AMDGPUCallLowering(const AMDGPUTargetLowering &TLI) in AMDGPUCallLowering()
H A DAMDGPULegalizerInfo.cpp2382 if (!AMDGPUTargetLowering::hasDefinedInitializer(GV)) { in legalizeGlobalValue()
3603 B.getMF(), AMDGPUTargetLowering::FIRST_IMPLICIT); in getImplicitArgPtr()