| /freebsd-12.1/sys/dev/uart/ |
| H A D | uart_dev_sab82532.c | 166 uart_setreg(bas, SAB_DAFO, dafo); in sab82532_param() 211 uart_setreg(bas, SAB_PCR, in sab82532_init() 215 uart_setreg(bas, SAB_PIM, 0xff); in sab82532_init() 234 uart_setreg(bas, SAB_CCR0, 0); in sab82532_init() 239 uart_setreg(bas, SAB_CCR0, ccr0); in sab82532_init() 245 uart_setreg(bas, SAB_CCR3, 0); in sab82532_init() 259 uart_setreg(bas, SAB_IMR1, 0xff); in sab82532_init() 286 uart_setreg(bas, SAB_PVR, pvr); in sab82532_term() 301 uart_setreg(bas, SAB_TIC, c); in sab82532_putc() 442 uart_setreg(bas, SAB_CCR0, 0); in sab82532_bus_detach() [all …]
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| H A D | uart_dev_ns8250.c | 118 uart_setreg(bas, REG_LCR, lcr); in ns8250_delay() 214 uart_setreg(bas, REG_FCR, fcr); in ns8250_flush() 251 uart_setreg(bas, REG_LCR, lcr); in ns8250_param() 318 uart_setreg(bas, REG_IER, ier); in ns8250_init() 326 uart_setreg(bas, REG_FCR, val); in ns8250_init() 353 uart_setreg(bas, REG_DATA, c); in ns8250_putc() 568 uart_setreg(bas, REG_IER, ier); in ns8250_bus_detach() 832 uart_setreg(bas, REG_FCR, val); in ns8250_bus_probe() 850 uart_setreg(bas, REG_FCR, val); in ns8250_bus_probe() 877 uart_setreg(bas, REG_DATA, 0); in ns8250_bus_probe() [all …]
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| H A D | uart_dev_mvebu.c | 214 uart_setreg(bas, UART_CCR, ccr | divisor); in uart_mvebu_param() 222 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_param() 248 uart_setreg(bas, UART_TSH, c & 0xff); in uart_mvebu_putc() 346 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_attach() 389 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_flush() 420 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_ioctl() 565 uart_setreg(bas, UART_CTRL, ctrl & ~CTRL_INTR_MASK); in uart_mvebu_bus_transmit() 569 uart_setreg(bas, UART_TSH, sc->sc_txbuf[i] & 0xff); in uart_mvebu_bus_transmit() 577 uart_setreg(bas, UART_CTRL, ctrl | CTRL_TX_IDLE_INT); in uart_mvebu_bus_transmit() 598 uart_setreg(bas, UART_CTRL, ctrl & ~CTRL_INTR_MASK); in uart_mvebu_bus_grab() [all …]
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| H A D | uart_dev_msm.c | 123 uart_setreg(bas, UART_DM_MR2, ulcon); in msm_uart_param() 164 uart_setreg(bas, UART_DM_MR1, 0x0); in msm_init() 167 uart_setreg(bas, UART_DM_IMR, 0); in msm_init() 174 uart_setreg(bas, UART_DM_TFWR, UART_DM_TFW_VALUE); in msm_init() 177 uart_setreg(bas, UART_DM_RFWR, UART_DM_RFW_VALUE); in msm_init() 186 uart_setreg(bas, UART_DM_IRDA, 0x0); in msm_init() 193 uart_setreg(bas, UART_DM_HCR, 0x0); in msm_init() 206 uart_setreg(bas, UART_DM_CR, UART_DM_CR_RX_ENABLE); in msm_init() 207 uart_setreg(bas, UART_DM_CR, UART_DM_CR_TX_ENABLE); in msm_init() 242 uart_setreg(bas, UART_DM_NO_CHARS_FOR_TX, 1); in msm_putc() [all …]
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| H A D | uart_dev_z8530.c | 60 uart_setreg(bas, REG_CTRL, reg); in uart_setmreg() 62 uart_setreg(bas, REG_CTRL, val); in uart_setmreg() 69 uart_setreg(bas, REG_CTRL, reg); in uart_getmreg() 235 uart_setreg(bas, REG_DATA, c); in z8530_putc() 459 uart_setreg(bas, REG_CTRL, CR_RSTTXI); in z8530_bus_ipend() 468 uart_setreg(bas, REG_CTRL, CR_RSTXSI); in z8530_bus_ipend() 481 uart_setreg(bas, REG_CTRL, CR_RSTERR); in z8530_bus_ipend() 488 uart_setreg(bas, REG_CTRL, CR_RSTIUS); in z8530_bus_ipend() 558 uart_setreg(bas, REG_CTRL, CR_RSTERR); in z8530_bus_receive() 569 uart_setreg(bas, REG_CTRL, CR_RSTERR); in z8530_bus_receive() [all …]
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| H A D | uart_dev_ti8250.c | 94 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_DISABLE); in ti8250_bus_probe() 95 uart_setreg(&sc->sc_bas, SYSCC_REG, SYSCC_SOFTRESET); in ti8250_bus_probe() 98 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_UART); in ti8250_bus_probe()
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| H A D | uart.h | 74 uart_setreg(struct uart_bas *bas, int reg, int value) in uart_setreg() function
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| /freebsd-12.1/sys/mips/cavium/ |
| H A D | uart_dev_oct16550.c | 122 uart_setreg(bas, REG_LCR, lcr); in oct16550_delay() 219 uart_setreg(bas, REG_FCR, fcr); in oct16550_flush() 257 uart_setreg(bas, REG_LCR, lcr); in oct16550_param() 309 uart_setreg(bas, REG_IER, ier); in oct16550_init() 328 uart_setreg(bas, REG_MCR, 0); in oct16550_term() 347 uart_setreg(bas, REG_DATA, c); in oct16550_putc() 480 uart_setreg(bas, REG_IER, ier); in oct16550_bus_detach() 544 uart_setreg(bas, REG_LCR, lcr); in oct16550_bus_ioctl() 557 uart_setreg(bas, REG_EFR, efr); in oct16550_bus_ioctl() 559 uart_setreg(bas, REG_LCR, lcr); in oct16550_bus_ioctl() [all …]
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| /freebsd-12.1/sys/arm/amlogic/aml8726/ |
| H A D | uart_dev_aml8726.c | 65 #undef uart_setreg 69 #define uart_setreg(bas, reg, value) \ macro 185 uart_setreg(bas, AML_UART_MISC_REG, mr); in aml8726_uart_param() 188 uart_setreg(bas, AML_UART_CONTROL_REG, cr); in aml8726_uart_param() 221 uart_setreg(bas, AML_UART_CONTROL_REG, cr); in aml8726_uart_init() 227 uart_setreg(bas, AML_UART_MISC_REG, mr); in aml8726_uart_init() 249 uart_setreg(bas, AML_UART_WFIFO_REG, c); in aml8726_uart_putc() 419 uart_setreg(bas, AML_UART_MISC_REG, mr); in aml8726_uart_bus_attach() 453 uart_setreg(bas, AML_UART_MISC_REG, mr); in aml8726_uart_bus_detach() 632 uart_setreg(bas, AML_UART_CONTROL_REG, in aml8726_uart_bus_receive() [all …]
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| /freebsd-12.1/sys/arm/freescale/vybrid/ |
| H A D | vf_uart.c | 161 uart_setreg(bas, UART_D, c); in vf_uart_putc() 222 uart_setreg(bas, UART_C2, 0x00); in uart_reinit() 224 uart_setreg(bas, UART_C1, 0x00); in uart_reinit() 232 uart_setreg(bas, UART_BDH, reg); in uart_reinit() 235 uart_setreg(bas, UART_BDL, reg); in uart_reinit() 240 uart_setreg(bas, UART_C4, reg); in uart_reinit() 244 uart_setreg(bas, UART_C2, reg); in uart_reinit() 310 uart_setreg(bas, UART_C2, reg); in vf_uart_bus_attach() 384 uart_setreg(bas, UART_S2, usr2); in vf_uart_bus_ipend() 466 uart_setreg(bas, UART_C2, reg); in vf_uart_bus_receive() [all …]
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| /freebsd-12.1/sys/mips/mediatek/ |
| H A D | uart_dev_mtk.c | 130 uart_setreg(bas, UART_LCR_REG, databits | in mtk_uart_init() 139 uart_setreg(bas, UART_MCR_REG, 0); in mtk_uart_term() 150 uart_setreg(bas, UART_TX_REG, c); in mtk_uart_putc() 262 uart_setreg(bas, UART_IER_REG, cr); in mtk_uart_disable_txintr() 277 uart_setreg(bas, UART_IER_REG, cr); in mtk_uart_enable_txintr() 308 uart_setreg(bas, UART_FCR_REG, in mtk_uart_bus_attach() 314 uart_setreg(bas, UART_IER_REG, in mtk_uart_bus_attach() 341 uart_setreg(bas, UART_FCR_REG, fcr); in mtk_uart_bus_flush() 410 uart_setreg(&sc->sc_bas, UART_LSR_REG, lsr); in mtk_uart_bus_ipend() 412 uart_setreg(&sc->sc_bas, UART_MSR_REG, msr); in mtk_uart_bus_ipend() [all …]
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| H A D | uart_dev_mtk.h | 37 #undef uart_setreg 40 #define uart_setreg(bas, reg, value) \ macro
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| /freebsd-12.1/sys/arm/samsung/exynos/ |
| H A D | exynos_uart.c | 123 uart_setreg(bas, SSCOM_ULCON, ulcon); in exynos4210_uart_param() 126 uart_setreg(bas, SSCOM_UBRDIV, brd); in exynos4210_uart_param() 157 uart_setreg(bas, SSCOM_UCON, 0); in exynos4210_init() 158 uart_setreg(bas, SSCOM_UFCON, in exynos4210_init() 165 uart_setreg(bas, SSCOM_UCON, UCON_TXMODE_INT | UCON_RXMODE_INT | in exynos4210_init() 167 uart_setreg(bas, SSCOM_UMCON, UMCON_RTS); in exynos4210_init() 184 uart_setreg(bas, SSCOM_UTXH, c); in exynos4210_putc()
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| /freebsd-12.1/sys/arm/nvidia/ |
| H A D | tegra_uart.c | 85 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_attach() 104 uart_setreg(bas, REG_IER, ier & ns8250->ier_mask); in tegra_uart_grab() 105 uart_setreg(bas, REG_FCR, 0); in tegra_uart_grab() 120 uart_setreg(bas, REG_FCR, ns8250->fcr); in tegra_uart_ungrab() 121 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_ungrab()
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| /freebsd-12.1/sys/mips/ingenic/ |
| H A D | jz4780_uart.c | 81 uart_setreg(bas, REG_IER, ns8250->ier); in jz4780_bus_attach()
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| /freebsd-12.1/sys/mips/atheros/ |
| H A D | uart_dev_ar933x.c | 651 uart_setreg(bas, REG_MCR, ns8250->mcr); in ar933x_bus_setsig()
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