| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 250 MI.getOperand(0).setSubReg(KilledProdSubReg); in processBlock()
251 MI.getOperand(1).setSubReg(KilledProdSubReg); in processBlock()
252 MI.getOperand(3).setSubReg(AddSubReg); in processBlock()
266 MI.getOperand(2).setSubReg(AddSubReg); in processBlock()
271 MI.getOperand(2).setSubReg(OtherProdSubReg); in processBlock()
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| H A D | PPCVSXCopy.cpp | 139 SrcMO.setSubReg(PPC::sub_64); in processBlock()
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| H A D | PPCInstrInfo.cpp | 426 MI.getOperand(0).setSubReg(SubReg2); in commuteInstructionImpl()
430 MI.getOperand(2).setSubReg(SubReg1); in commuteInstructionImpl()
431 MI.getOperand(1).setSubReg(SubReg2); in commuteInstructionImpl()
1984 SubRegsToUpdate[i].first->setSubReg(SubRegsToUpdate[i].second); in optimizeCompareInstr()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 591 Copy->getOperand(0).setSubReg(SubIdx); in INITIALIZE_PASS_DEPENDENCY()
858 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
948 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1075 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1241 NewCopy->getOperand(0).setSubReg(Def.SubReg); in rewriteSource()
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| H A D | TwoAddressInstructionPass.cpp | 1489 SrcMO.setSubReg(0); in collectTiedOperands()
1607 MO.setSubReg(0); in processTiedPairs()
1625 MO.setSubReg(0); in processTiedPairs()
1769 mi->getOperand(0).setSubReg(SubIdx); in runOnMachineFunction()
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| H A D | TargetInstrInfo.cpp | 210 CommutedMI->getOperand(0).setSubReg(SubReg0); in commuteInstructionImpl()
214 CommutedMI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstructionImpl()
215 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| H A D | LiveDebugVariables.cpp | 963 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
1112 Loc.setSubReg(0); in rewriteLocations()
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| H A D | MachineOperand.cpp | 81 setSubReg(SubIdx); in substVirtReg()
90 setSubReg(0); in substPhysReg()
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| H A D | VirtRegMap.cpp | 567 MO.setSubReg(0); in rewrite()
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| H A D | TailDuplicator.cpp | 428 MO.setSubReg(TRI->composeSubRegIndices(MO.getSubReg(), in duplicateInstruction()
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| H A D | RegAllocFast.cpp | 720 MO.setSubReg(0); in setPhysReg()
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| H A D | RegisterCoalescer.cpp | 1272 DefMO.setSubReg(0); in reMaterializeTrivialDef()
1333 NewMI.getOperand(0).setSubReg(NewIdx); in reMaterializeTrivialDef()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 460 void setSubReg(unsigned subReg) { in setSubReg() function
778 Op.setSubReg(SubReg);
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | RDFCopy.cpp | 182 Op.setSubReg(0); in run()
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| H A D | HexagonBitSimplify.cpp | 381 I->setSubReg(NewSR); in replaceRegWithSub()
400 I->setSubReg(NewSR); in replaceSubWithSub()
1934 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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| H A D | HexagonExpandCondsets.cpp | 925 Op.setSubReg(RN.Sub); in renameInRange()
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| H A D | HexagonSplitDouble.cpp | 1096 Op.setSubReg(0); in replaceSubregUses()
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| H A D | HexagonHardwareLoops.cpp | 1922 MO.setSubReg(PredRSub); in createPreheaderForLoop()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 90 Src0.setSubReg(0); in foldImmediates()
94 Src0.setSubReg(0); in foldImmediates()
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| H A D | SIInstrInfo.cpp | 1361 NonRegOp.setSubReg(SubReg); in swapRegAndNonRegOperand()
2074 Src0->setSubReg(Src1SubReg); in FoldImmediate()
3564 Src0.setSubReg(Src1.getSubReg()); in legalizeOperandsVOP2()
3569 Src1.setSubReg(Src0SubReg); in legalizeOperandsVOP2()
3687 Op.setSubReg(0); in legalizeGenericOperand()
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| H A D | SIFoldOperands.cpp | 496 UseMI->getOperand(1).setSubReg(OpToFold.getSubReg()); in foldOperand()
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| H A D | SIPeepholeSDWA.cpp | 279 To.setSubReg(From.getSubReg()); in copyRegOperand()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86DomainReassignment.cpp | 519 MO.setSubReg(0); in reassign()
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| H A D | X86InstructionSelector.cpp | 292 I.getOperand(1).setSubReg(getSubRegIndex(DstRC)); in selectCopy()
758 I.getOperand(1).setSubReg(SubIdx); in selectTruncOrPtrToInt()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1216 I.getOperand(1).setSubReg(AArch64::sub_32); in select()
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