Searched refs:isSEXTLoad (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7210 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N)) in isSignExtended()
7301 assert((ISD::isSEXTLoad(LD) || ISD::isZEXTLoad(LD)) && in SkipExtensionForVMULL()
13363 bool isSEXTLoad, SDValue &Base, in getARMIndexedAddressParts() argument
13369 if (VT == MVT::i16 || ((VT == MVT::i8 || VT == MVT::i1) && isSEXTLoad)) { in getARMIndexedAddressParts()
13422 bool isSEXTLoad, SDValue &Base, in getT2IndexedAddressParts() argument
13459 bool isSEXTLoad = false; in getPreIndexedAddressParts() local
13463 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPreIndexedAddressParts()
13495 bool isSEXTLoad = false, isNonExt; in getPostIndexedAddressParts() local
13499 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPostIndexedAddressParts()
13527 isLegal = getT2IndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset, in getPostIndexedAddressParts()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 2435 inline bool isSEXTLoad(const SDNode *N) {
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4795 if (ISD::isSEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) && in visitAND()
8508 bool isAExtLoad = (ExtLoadType == ISD::SEXTLOAD) ? ISD::isSEXTLoad(N0Node) in tryToFoldExtOfExtload()
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