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Searched refs:isPredicable (Results 1 – 25 of 40) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td162 let isCall = 1, hasSideEffects = 1, isPredicable = 0,
179 isPredicable = 0 in
208 let isPredicable = 0; // !if(isPred, 0, 1);
221 isPredicable = 1, hasSideEffects = 0, InputType = "reg",
235 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in
239 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0,
245 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0,
338 isPredicable = 1,
354 Defs = [R29, R30, R31, PC], isPredicable = 0, isAsmParserOnly = 1 in {
H A DHexagonExpandCondsets.cpp219 bool isPredicable(MachineInstr *MI);
722 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) { in isPredicable() function in HexagonExpandCondsets
723 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable()
960 if (!DefI || !isPredicable(DefI)) in predicate()
1227 if (!RDef || !HII->isPredicable(*RDef)) { in coalesceSegments()
1238 if (!RDef || !HII->isPredicable(*RDef)) { in coalesceSegments()
H A DHexagonEarlyIfConv.cpp482 if (!HII->isPredicable(*Def1) || !HII->isPredicable(*Def3)) in computePhiCost()
681 return MI->mayStore() && HII->isPredicable(const_cast<MachineInstr&>(*MI)); in isPredicableStore()
H A DHexagonDepInstrInfo.td58 let isPredicable = 1;
221 let isPredicable = 1;
308 let isPredicable = 1;
346 let isPredicable = 1;
358 let isPredicable = 1;
433 let isPredicable = 1;
593 let isPredicable = 1;
1069 let isPredicable = 1;
1404 let isPredicable = 1;
1416 let isPredicable = 1;
[all …]
H A DHexagonInstrInfo.h257 bool isPredicable(const MachineInstr &MI) const override;
/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCInstrDesc.h308 bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); } in isPredicable() function
587 if (isPredicable()) { in findFirstPredOperandIdx()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp797 if (!NewMCID.isPredicable()) in ReduceTo2Addr()
801 SkipPred = !NewMCID.isPredicable(); in ReduceTo2Addr()
890 if (!NewMCID.isPredicable()) in ReduceToNarrow()
894 SkipPred = !NewMCID.isPredicable(); in ReduceToNarrow()
959 if (!MCID.isPredicable() && NewMCID.isPredicable()) in ReduceToNarrow()
H A DARMBaseInstrInfo.h166 bool isPredicable(const MachineInstr &MI) const override;
H A DARMConstantIslandPass.cpp586 MI->getOperand(NumOps - (MI->isPredicable() ? 2 : 1)); in doInitialJumpTablePlacement()
2113 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1); in optimizeThumb2JumpTables()
2306 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1); in reorderThumb2JumpTables()
H A DThumbRegisterInfo.cpp619 if (MI.isPredicable()) in eliminateFrameIndex()
/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DCodeGenInstruction.h151 bool isPredicable; variable
253 bool isPredicable : 1; variable
H A DCodeGenInstruction.cpp29 isPredicable = false; in CGIOperandList()
101 isPredicable = true; in CGIOperandList()
357 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable"); in CodeGenInstruction()
H A DInstrDocsEmitter.cpp119 FLAG(isPredicable) in EmitInstrDocs()
H A DInstrInfoEmitter.cpp607 if (Inst.isPredicable) OS << "|(1ULL<<MCID::Predicable)"; in emitRecord()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.h219 bool isPredicable(const MachineInstr &MI) const override;
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h183 bool isPredicable(const MachineInstr &MI) const override;
H A DR600InstrInfo.cpp878 bool R600InstrInfo::isPredicable(const MachineInstr &MI) const { in isPredicable() function in R600InstrInfo
896 return TargetInstrInfo::isPredicable(MI); in isPredicable()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1238 virtual bool isPredicable(const MachineInstr &MI) const { in isPredicable() function
1239 return MI.getDesc().isPredicable(); in isPredicable()
H A DMachineInstr.h687 bool isPredicable(QueryType Type = AllInBundle) const {
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp171 if (!MI.isPredicable()) in isUnpredicatedTerminator()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h354 bool isPredicable(const MachineInstr &MI) const override;
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp371 if (!((MI.mayLoad() || MI.mayStore()) && !MI.isPredicable() && in isSuitableMemoryOp()
H A DTargetInstrInfo.cpp307 if (!MI.isPredicable()) in isUnpredicatedTerminator()
320 if (!MI.isPredicable()) in PredicateInstruction()
H A DMachineSink.cpp727 if (!(MI.mayLoad() && !MI.isPredicable())) in SinkingPreventsImplicitNullCheck()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp468 if (!MI->isPredicable()) in canFoldIntoSelect()

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