| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | ValueTypes.cpp | 281 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT() function in MVT 301 getVT(VTy->getElementType(), false), VTy->getNumElements()); in getVT() 312 return MVT::getVT(Ty, HandleUnknown); in getEVT()
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | DAGISelMatcherEmitter.cpp | 603 << getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", "; in EmitMatcher() 612 << getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", " in EmitMatcher() 623 OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher() 627 OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher() 720 OS << getEnumName(EN->getVT(i)) << ", "; in EmitMatcher()
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| H A D | DAGISelMatcher.h | 759 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 783 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 808 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 950 MVT::SimpleValueType getVT(unsigned i) const { in getVT() function
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 124 MVT CurVT = MVT::getVT(Args[i].Ty); in handleAssignments()
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| H A D | LegalizerHelper.cpp | 161 auto ToMVT = MVT::getVT(ToType); in getConvRTLibDesc() 162 auto FromMVT = MVT::getVT(FromType); in getConvRTLibDesc()
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.td | 658 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32; 664 return cast<VTSDNode>(N->getOperand(1))->getVT() == MVT::i32; 667 return cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits() <= 5;
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| H A D | RISCVISelLowering.cpp | 197 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 558 cast<VTSDNode>(RHS->getOperand(1))->getVT().getSizeInBits() <= 5)) in PerformDAGCombine()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 436 cast<VTSDNode>(Node->getOperand(1))->getVT()); in LegalizeOp() 880 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT(); in ExpandSEXTINREG()
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| H A D | SelectionDAG.cpp | 869 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps() 2124 EVT ExVT = cast<VTSDNode>(V.getOperand(1))->getVT(); in GetDemandedBits() 2743 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits() 2857 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits() 3307 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits() 3310 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits() 3417 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits(); in ComputeNumSignBits() 4887 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() 4912 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() 4924 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() [all …]
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| H A D | SelectionDAGDumper.cpp | 619 OS << ":" << N->getVT().getEVTString(); in print_details()
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| H A D | TargetLowering.cpp | 1031 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits() 1235 EVT ZVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits() 2487 EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT(); in SimplifySetCC() 2594 cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1) in SimplifySetCC() 3394 MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true); in ParseConstraints() 3401 OpInfo.ConstraintVT = MVT::getVT(OpTy, true); in ParseConstraints()
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| H A D | SelectionDAGISel.cpp | 2734 if (cast<VTSDNode>(N)->getVT() == VT) in CheckValueType() 2738 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI->getPointerTy(DL); in CheckValueType()
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| H A D | DAGCombiner.cpp | 2294 if (TN->getVT() == MVT::i1) { in visitADDLike() 2763 if (TN->getVT() == MVT::i1) { in visitSUB() 4361 cast<VTSDNode>(Op.getOperand(1))->getVT() : in SearchForAndLoads() 9240 EVT AssertVT = cast<VTSDNode>(N1)->getVT(); in visitAssertExt() 9244 AssertVT == cast<VTSDNode>(N0.getOperand(1))->getVT()) in visitAssertExt() 9255 EVT BigA_AssertVT = cast<VTSDNode>(BigA.getOperand(1))->getVT(); in visitAssertExt() 9275 EVT BigA_AssertVT = cast<VTSDNode>(BigA.getOperand(1))->getVT(); in visitAssertExt() 9315 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ReduceLoadWidth() 9505 EVT EVT = cast<VTSDNode>(N1)->getVT(); in visitSIGN_EXTEND_INREG() 9522 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) in visitSIGN_EXTEND_INREG() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 2203 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertSext() 2225 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertZext() 2876 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_SIGN_EXTEND_INREG()
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| H A D | LegalizeVectorTypes.cpp | 338 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() 1112 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT()); in SplitVecRes_InregOp() 3030 cast<VTSDNode>(N->getOperand(1))->getVT() in WidenVecRes_InregOp()
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| H A D | LegalizeDAG.cpp | 1002 EVT InnerType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp() 2815 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode() 2853 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 554 MVT VT = MVT::getVT(Shuffles[0]->getType()); in deinterleave8bitStride3()
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| /freebsd-12.1/contrib/llvm/include/llvm/Support/ |
| H A D | MachineValueType.h | 987 static MVT getVT(Type *Ty, bool HandleUnknown = false);
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1442 : cast<VTSDNode>(N.getOperand(1))->getVT(); in DetectUseSxtw() 1511 if (T->getVT().getSizeInBits() == NumBits) { in keepsLowBits() 1584 return VN->getVT().getSizeInBits() <= 16; in isPositiveHalfWord()
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| H A D | HexagonISelLowering.cpp | 842 EVT OrigTy = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSETCC() 1779 Info.memVT = MVT::getVT(ElTy); in getTgtMemIntrinsic() 1804 Info.memVT = MVT::getVT(VecTy); in getTgtMemIntrinsic()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 185 unsigned Width = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in LowerSIGN_EXTEND_INREG()
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| /freebsd-12.1/contrib/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 771 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>; 772 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 2036 EVT getVT() const { return ValueType; }
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 505 EVT ExtendTy = cast<VTSDNode>(Op0Op2)->getVT(); in performANDCombine() 908 EVT ExtendTy = cast<VTSDNode>(Op0Op0->getOperand(2))->getVT(); in performSRACombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8083 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 8094 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 10628 if ((TypeNode->getVT() == MVT::i8 && width == 8) in checkValueWidth() 10629 || (TypeNode->getVT() == MVT::i16 && width == 16)) { in checkValueWidth() 10637 if ((TypeNode->getVT() == MVT::i8 && width == 8) in checkValueWidth() 10638 || (TypeNode->getVT() == MVT::i16 && width == 16)) { in checkValueWidth()
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