| /freebsd-12.1/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 86 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate() 110 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal() 149 if (auto MI = MRI.getUniqueVRegDef(NVPTX::VRFrame)) { in runOnMachineFunction()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixupVectorISel.cpp | 98 MachineInstr *DefInst = MRI.getUniqueVRegDef(WOp->getReg()); in findSRegBaseAndIndex() 122 MachineInstr *MI = MRI.getUniqueVRegDef(IndexReg); in findSRegBaseAndIndex() 134 MI = MRI.getUniqueVRegDef(BaseReg); in findSRegBaseAndIndex()
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| H A D | SILowerControlFlow.cpp | 341 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak() 421 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands() 464 MRI->getUniqueVRegDef(Reg)->eraseFromParent(); in combineMasks()
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| H A D | SILoadStoreOptimizer.cpp | 1192 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in extractConstOffset() 1215 MachineInstr *Def = MRI->getUniqueVRegDef(Base.getReg()); in processBaseWithConstOffset() 1225 MachineInstr *BaseLoDef = MRI->getUniqueVRegDef(BaseLo.getReg()); in processBaseWithConstOffset() 1226 MachineInstr *BaseHiDef = MRI->getUniqueVRegDef(BaseHi.getReg()); in processBaseWithConstOffset()
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| H A D | SILowerI1Copies.cpp | 524 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in lowerPhis() 691 MI = MRI->getUniqueVRegDef(Reg); in isConstantLaneMask()
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| H A D | AMDGPUInstructionSelector.cpp | 395 const MachineInstr *PtrMI = MRI.getUniqueVRegDef(Load.getOperand(1).getReg()); in getAddrModeInfo() 406 const MachineInstr *OpDef = MRI.getUniqueVRegDef(GEPOp.getReg()); in getAddrModeInfo()
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 100 auto SaveExecInst = MRI.getUniqueVRegDef(SavedExec); in getOrExecSource()
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| H A D | SIShrinkInstructions.cpp | 81 MachineInstr *Def = MRI.getUniqueVRegDef(Reg); in foldImmediates()
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| H A D | SIPeepholeSDWA.cpp | 322 MachineInstr *DefInstr = MRI->getUniqueVRegDef(Reg->getReg()); in findSingleRegDef()
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| H A D | SIInstrInfo.cpp | 2103 MachineInstr *Def = MRI->getUniqueVRegDef(Src0->getReg()); in FoldImmediate() 2119 MachineInstr *Def = MRI->getUniqueVRegDef(Src1->getReg()); in FoldImmediate() 2266 auto Def = MRI.getUniqueVRegDef(MO->getReg()); in getFoldableImm()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86WinAllocaExpander.cpp | 86 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getWinAllocaAmount() 90 Def = MRI->getUniqueVRegDef(Def->getOperand(1).getReg()); in getWinAllocaAmount() 269 MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg); in lower()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 670 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands() 672 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands() 682 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling() 683 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling() 859 Prev = MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in genAlternativeCodeSequence() 863 Prev = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genAlternativeCodeSequence()
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| H A D | MachineCombiner.cpp | 142 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| H A D | MachineCSE.cpp | 626 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlock()
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| H A D | MachineRegisterInfo.cpp | 412 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(unsigned Reg) const { in getUniqueVRegDef() function in MachineRegisterInfo
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| H A D | MachinePipeliner.cpp | 637 MachineInstr *DefMI = MRI.getUniqueVRegDef(Reg); in updatePhiDependences() 692 MachineInstr *DefMI = MRI.getUniqueVRegDef(OrigBase); in changeDependences() 699 MachineInstr *LastMI = MRI.getUniqueVRegDef(NewBase); in changeDependences()
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| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMachineFunctionInfo.h | 90 assert(MF.getRegInfo().getUniqueVRegDef(VReg)); in stackifyVReg()
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| H A D | WebAssemblyRegisterInfo.cpp | 94 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| H A D | WebAssemblyRegStackify.cpp | 274 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in GetVRegDef()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64CondBrTuning.cpp | 84 return MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| H A D | AArch64SIMDInstrOpt.cpp | 520 DefiningMI = MRI->getUniqueVRegDef(SeqReg); in optimizeLdStInterleave()
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| H A D | AArch64InstrInfo.cpp | 1444 MachineInstr *MI = MRI->getUniqueVRegDef(SrcReg); in substituteCmpToZero() 3517 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 3994 MachineInstr *MUL = MRI.getUniqueVRegDef(Root.getOperand(IdxMulOpd).getReg()); in genFusedMultiply() 4071 MachineInstr *MUL = MRI.getUniqueVRegDef(Root.getOperand(IdxMulOpd).getReg()); in genMaddR()
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| H A D | AArch64FastISel.cpp | 2014 auto *MI = MRI.getUniqueVRegDef(Reg); in selectLoad() 2046 MI = MRI.getUniqueVRegDef(Reg); in selectLoad() 4484 MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in optimizeIntExtLoad() 4495 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 597 MachineInstr *getUniqueVRegDef(unsigned Reg) const;
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| /freebsd-12.1/contrib/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 288 MachineInstr *MI = MRI->getUniqueVRegDef(SrcReg); in optimizeCompareInstr()
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