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Searched refs:getTargetInsertSubreg (Results 1 – 9 of 9) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2717 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_even, dl, MVT::f64, in LowerF64Op()
2719 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_odd, dl, MVT::f64, in LowerF64Op()
2874 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_even64, dl, MVT::f128, in LowerFNEGorFABS()
2876 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_odd64, dl, MVT::f128, in LowerFNEGorFABS()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1237 SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp935 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32, in convertTo()
H A DSystemZISelLowering.cpp2912 In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
2925 SDValue In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
3215 return DAG.getTargetInsertSubreg(SystemZ::subreg_l32, DL, in lowerOR()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp896 return DAG.getTargetInsertSubreg(SubIdx, dl, VecTy, VecV, SubV); in insertHvxSubvectorReg()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp2981 CurDAG->getTargetInsertSubreg(X86::sub_8bit, DL, XVT, ImplDef, NBits); in matchBitExtract()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1308 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
H A DAArch64ISelLowering.cpp4533 VecVal1 = DAG.getTargetInsertSubreg(Idx, DL, VecVT, in LowerFCOPYSIGN()
4535 VecVal2 = DAG.getTargetInsertSubreg(Idx, DL, VecVT, in LowerFCOPYSIGN()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp7831 SDValue SelectionDAG::getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT, in getTargetInsertSubreg() function in SelectionDAG