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Searched refs:createReg (Results 1 – 25 of 64) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp1400 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR64RegisterClass()
1411 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRMM16RegisterClass()
1422 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRMM16ZeroRegisterClass()
1433 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRMM16MovePRegisterClass()
1444 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass()
1473 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFGR64RegisterClass()
1485 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFGR32RegisterClass()
1496 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeCCRRegisterClass()
1507 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFCCRegisterClass()
1518 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFGRCCRegisterClass()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp274 mcInst.addOperand(MCOperand::createReg(llvmRegnum)); in translateRegister()
342 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateSrcIndex()
367 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateDstIndex()
822 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory()
823 indexReg = MCOperand::createReg(X86::SI); in translateRMMemory()
826 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory()
827 indexReg = MCOperand::createReg(X86::DI); in translateRMMemory()
830 baseReg = MCOperand::createReg(X86::BP); in translateRMMemory()
831 indexReg = MCOperand::createReg(X86::SI); in translateRMMemory()
834 baseReg = MCOperand::createReg(X86::BP); in translateRMMemory()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp79 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
226 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
233 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
238 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
254 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
259 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
274 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIX16Operands()
289 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE8Operands()
304 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE4Operands()
319 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE2Operands()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp89 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
297 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr12Operand()
307 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr20Operand()
318 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr12Operand()
330 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr20Operand()
342 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDLAddr12Len4Operand()
354 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDLAddr12Len8Operand()
366 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDRAddr12Operand()
368 Inst.addOperand(MCOperand::createReg(Regs[Length])); in decodeBDRAddr12Operand()
378 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDVAddr12Operand()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp41 NopInst.addOperand(MCOperand::createReg(0)); in getNoop()
44 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNoop()
45 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNoop()
47 NopInst.addOperand(MCOperand::createReg(0)); in getNoop()
48 NopInst.addOperand(MCOperand::createReg(0)); in getNoop()
H A DThumb1InstrInfo.cpp29 NopInst.addOperand(MCOperand::createReg(ARM::R8)); in getNoop()
30 NopInst.addOperand(MCOperand::createReg(ARM::R8)); in getNoop()
32 NopInst.addOperand(MCOperand::createReg(0)); in getNoop()
H A DARMAsmPrinter.cpp1412 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1414 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1444 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1446 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1689 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1693 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1696 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1704 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1709 TmpInst.addOperand(MCOperand::createReg(0)); in EmitInstruction()
1717 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp656 MOVI.addOperand(MCOperand::createReg(DestReg)); in EmitFMov0()
665 FMov.addOperand(MCOperand::createReg(DestReg)); in EmitFMov0()
670 FMov.addOperand(MCOperand::createReg(DestReg)); in EmitFMov0()
675 FMov.addOperand(MCOperand::createReg(DestReg)); in EmitFMov0()
720 MovZ.addOperand(MCOperand::createReg(DestReg)); in EmitInstruction()
727 MovK.addOperand(MCOperand::createReg(DestReg)); in EmitInstruction()
728 MovK.addOperand(MCOperand::createReg(DestReg)); in EmitInstruction()
817 Ldr.addOperand(MCOperand::createReg(AArch64::X1)); in EmitInstruction()
818 Ldr.addOperand(MCOperand::createReg(AArch64::X0)); in EmitInstruction()
825 Add.addOperand(MCOperand::createReg(AArch64::X0)); in EmitInstruction()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp2019 Inst.addOperand(MCOperand::createReg(RegNum)); in addCondCodeOperands()
2089 Inst.addOperand(MCOperand::createReg(*I)); in addRegListOperands()
2423 Inst.addOperand(MCOperand::createReg(0)); in addAM2OffsetImmOperands()
2434 Inst.addOperand(MCOperand::createReg(0)); in addAddrMode3Operands()
2474 Inst.addOperand(MCOperand::createReg(0)); in addAM3OffsetOperands()
7182 TmpInst.addOperand(MCOperand::createReg(0)); in processInstruction()
7200 TmpInst.addOperand(MCOperand::createReg(0)); in processInstruction()
8473 TmpInst.addOperand(MCOperand::createReg( in processInstruction()
8480 TmpInst.addOperand(MCOperand::createReg( in processInstruction()
8526 TmpInst.addOperand(MCOperand::createReg( in processInstruction()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp150 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitR()
159 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRX()
190 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRX()
191 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRX()
215 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRIII()
216 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRIII()
1139 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad()
1166 TmpInst.addOperand(MCOperand::createReg(RegNo)); in emitDirectiveCpLoad()
1262 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpreturn()
1267 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpreturn()
[all …]
H A DMipsNaClELFStreamer.cpp106 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
107 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
108 MaskInst.addOperand(MCOperand::createReg(MaskReg)); in emitMask()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp168 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
177 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRiMemoryValue()
189 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
191 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
201 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeSplsValue()
/freebsd-12.1/contrib/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h465 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
473 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR32orGR64Operands()
488 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addMemOperands()
490 Inst.addOperand(MCOperand::createReg(getMemIndexReg())); in addMemOperands()
492 Inst.addOperand(MCOperand::createReg(getMemSegReg())); in addMemOperands()
506 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addSrcIdxOperands()
507 Inst.addOperand(MCOperand::createReg(getMemSegReg())); in addSrcIdxOperands()
512 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addDstIdxOperands()
522 Inst.addOperand(MCOperand::createReg(getMemSegReg())); in addMemOffsOperands()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp80 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
105 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass()
116 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass()
141 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass()
152 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64CRegisterClass()
183 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRCRegisterClass()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp108 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
123 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass()
130 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeMemoryOpValue()
211 Instr.addOperand(MCOperand::createReg(BPF::R6)); in getInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp159 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeIntRegsRegisterClass()
170 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeI64RegsRegisterClass()
182 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPRegsRegisterClass()
194 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeDFPRegsRegisterClass()
209 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeQFPRegsRegisterClass()
220 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeCPRegsRegisterClass()
229 Inst.addOperand(MCOperand::createReg(FCCRegDecoderTable[RegNo])); in DecodeFCCRegsRegisterClass()
238 Inst.addOperand(MCOperand::createReg(ASRRegDecoderTable[RegNo])); in DecodeASRRegsRegisterClass()
247 Inst.addOperand(MCOperand::createReg(PRRegDecoderTable[RegNo])); in DecodePRRegsRegisterClass()
262 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeIntPairRegisterClass()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVAsmBackend.cpp102 Res.addOperand(MCOperand::createReg(RISCV::X0)); in relaxInstruction()
109 Res.addOperand(MCOperand::createReg(RISCV::X0)); in relaxInstruction()
115 Res.addOperand(MCOperand::createReg(RISCV::X0)); in relaxInstruction()
121 Res.addOperand(MCOperand::createReg(RISCV::X1)); in relaxInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp319 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR128RegisterClass()
348 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR64RegisterClass()
369 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR32RegisterClass()
390 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR16RegisterClass()
411 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR8RegisterClass()
432 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64commonRegisterClass()
443 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64RegisterClass()
455 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64spRegisterClass()
476 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR32RegisterClass()
489 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR32spRegisterClass()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp416 Inst.addOperand(MCOperand::createReg(RRegs[getReg()])); in addRegGPRCOperands()
426 Inst.addOperand(MCOperand::createReg(XRegs[getReg()])); in addRegG8RCOperands()
450 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF4RCOperands()
455 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF8RCOperands()
460 Inst.addOperand(MCOperand::createReg(VFRegs[getReg()])); in addRegVFRCOperands()
465 Inst.addOperand(MCOperand::createReg(VRegs[getReg()])); in addRegVRRCOperands()
485 Inst.addOperand(MCOperand::createReg(QFRegs[getReg()])); in addRegQFRCOperands()
490 Inst.addOperand(MCOperand::createReg(QFRegs[getReg()])); in addRegQSRCOperands()
495 Inst.addOperand(MCOperand::createReg(QFRegs[getReg()])); in addRegQBRCOperands()
500 Inst.addOperand(MCOperand::createReg(RRegs[getReg()])); in addRegSPE4RCOperands()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp297 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
306 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDAddrOperands()
312 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDXAddrOperands()
314 Inst.addOperand(MCOperand::createReg(Mem.Index)); in addBDXAddrOperands()
319 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDLAddrOperands()
326 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDRAddrOperands()
328 Inst.addOperand(MCOperand::createReg(Mem.Length.Reg)); in addBDRAddrOperands()
333 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDVAddrOperands()
335 Inst.addOperand(MCOperand::createReg(Mem.Index)); in addBDVAddrOperands()
769 Operands.push_back(SystemZOperand::createReg(Kind, Reg.Num, in parseRegister()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp188 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
204 static std::unique_ptr<BPFOperand> createReg(unsigned RegNo, SMLoc S, in createReg() function
420 Operands.push_back(BPFOperand::createReg(RegNo, S, E)); in parseRegister()
459 Operands.push_back(BPFOperand::createReg(RegNo, NameLoc, E)); in ParseInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp411 return MCOperand::createReg(MO.getReg()); in LowerMachineOperand()
542 OutMI.addOperand(MCOperand::createReg(ReturnReg)); in Lower()
730 LEA.addOperand(MCOperand::createReg(X86::RDI)); // dest in LowerTlsAddr()
731 LEA.addOperand(MCOperand::createReg(X86::RIP)); // base in LowerTlsAddr()
735 LEA.addOperand(MCOperand::createReg(0)); // seg in LowerTlsAddr()
738 LEA.addOperand(MCOperand::createReg(X86::EAX)); // dest in LowerTlsAddr()
739 LEA.addOperand(MCOperand::createReg(X86::EBX)); // base in LowerTlsAddr()
743 LEA.addOperand(MCOperand::createReg(0)); // seg in LowerTlsAddr()
746 LEA.addOperand(MCOperand::createReg(X86::EAX)); // dest in LowerTlsAddr()
751 LEA.addOperand(MCOperand::createReg(0)); // seg in LowerTlsAddr()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp637 MI.insert(I, MCOperand::createReg(0)); in AddThumbPredicate()
647 MI.insert(I, MCOperand::createReg(0)); in AddThumbPredicate()
1120 Inst.addOperand(MCOperand::createReg(0)); in DecodePredicateOperand()
1131 Inst.addOperand(MCOperand::createReg(0)); in DecodeCCOutOperand()
1564 Inst.addOperand(MCOperand::createReg(0)); in DecodeAddrMode2IdxInstruction()
1796 Inst.addOperand(MCOperand::createReg(0)); in DecodeAddrMode3Instruction()
2553 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLDInstruction()
3046 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD3DupInstruction()
3098 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD4DupInstruction()
4427 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD1LN()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp144 TmpInst0.addOperand(MCOperand::createReg(ZeroReg)); in emitPseudoIndirectBranch()
861 I.addOperand(MCOperand::createReg(Reg)); in EmitInstrReg()
880 I.addOperand(MCOperand::createReg(Reg1)); in EmitInstrRegReg()
881 I.addOperand(MCOperand::createReg(Reg2)); in EmitInstrRegReg()
890 I.addOperand(MCOperand::createReg(Reg1)); in EmitInstrRegRegReg()
891 I.addOperand(MCOperand::createReg(Reg2)); in EmitInstrRegRegReg()
892 I.addOperand(MCOperand::createReg(Reg3)); in EmitInstrRegRegReg()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp293 Inst.addOperand(MCOperand::createReg(Hexagon::R0)); in HexagonProcessInstruction()
474 TmpInst.addOperand(MCOperand::createReg(High)); in HexagonProcessInstruction()
475 TmpInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
552 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
564 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
578 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()

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