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Searched refs:bitsLT (Results 1 – 24 of 24) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DValueTypes.h241 bool bitsLT(EVT VT) const { in bitsLT() function
H A DTargetLowering.h3421 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp93 else if (Src.getValueType().bitsLT(MVT::i32)) in EmitSpecializedLibcall()
H A DARMISelLowering.cpp6647 if (SrcEltTy.bitsLT(SmallestEltTy)) in ReconstructShuffle()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp906 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT()
1339 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown()
1375 if (VT.bitsLT(MinVT)) in GetReturnInfo()
H A DCodeGenPrepare.cpp1132 if (SrcVT.bitsLT(DstVT)) return false; in OptimizeNoopCopyExpression()
/freebsd-12.1/contrib/llvm/include/llvm/Support/
H A DMachineValueType.h782 bool bitsLT(MVT VT) const { in bitsLT() function
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp228 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); in ExpandRes_EXTRACT_VECTOR_ELT()
H A DSelectionDAG.cpp4054 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in FoldCONCAT_VECTORS()
4286 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4299 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4315 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4331 assert(Operand.getValueType().bitsLT(VT) && in getNode()
4366 .bitsLT(VT.getScalarType())) in getNode()
4621 if (LegalSVT.bitsLT(SVT)) in FoldConstantArithmetic()
4708 if (LegalSVT.bitsLT(VT.getScalarType())) in FoldConstantVectorArithmetic()
6017 if (VT.bitsLT(LargestVT)) { in getMemsetStores()
6634 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && in getLoad()
[all …]
H A DFastISel.cpp519 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex()
1894 if (DstVT.bitsLT(SrcVT)) in selectOperator()
H A DLegalizeDAG.cpp1401 if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) { in ExpandVectorBuildThroughStack()
2925 if (NewEltVT.bitsLT(EltVT)) { in ExpandNode()
4397 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
4430 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
4476 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
H A DLegalizeVectorTypes.cpp443 if (BoolVT.bitsLT(CondVT)) in ScalarizeVecRes_VSELECT()
1727 if (N->getValueType(0).bitsLT(N->getOperand(0).getValueType())) in SplitVectorOperand()
1963 if (N->getValueType(0).bitsLT(EltVT)) { in SplitVecOp_EXTRACT_VECTOR_ELT()
4447 assert(StVT.bitsLT(ValOp.getValueType())); in GenWidenVectorTruncStores()
H A DDAGCombiner.cpp8892 if (SrcVT.bitsLT(VT) && VT.isVector()) { in visitZERO_EXTEND()
9261 EVT MinAssertVT = AssertVT.bitsLT(BigA_AssertVT) ? AssertVT : BigA_AssertVT; in visitAssertExt()
9280 if (AssertVT.bitsLT(BigA_AssertVT)) { in visitAssertExt()
9522 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) in visitSIGN_EXTEND_INREG()
9692 if (N0.getOperand(0).getValueType().bitsLT(VT)) in visitTRUNCATE()
12168 if (VT.bitsLT(In.getValueType())) in visitFP_EXTEND()
15648 if (ResultVT.bitsLT(VecEltVT)) in scalarizeExtractedVectorLoad()
15869 if (ScalarVT.bitsLT(LVT) && !TLI.isTruncateFree(LVT, ScalarVT)) in visitEXTRACT_VECTOR_ELT()
17311 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in combineShuffleOfScalars()
17721 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE()
[all …]
H A DTargetLowering.cpp2584 else if (Op0.getValueType().bitsLT(VT)) in SimplifySetCC()
5264 if (VT.bitsLT(MVT::i32)) { in lowerCmpEqZeroToCtlzSrl()
H A DSelectionDAGBuilder.cpp290 ValueVT.bitsLT(PartEVT)) { in getCopyFromParts()
303 if (ValueVT.bitsLT(PartEVT)) { in getCopyFromParts()
317 if (ValueVT.bitsLT(Val.getValueType())) in getCopyFromParts()
H A DLegalizeIntegerTypes.cpp3698 if (N->getOperand(i).getValueType().bitsLT(NOutVTElem)) in PromoteIntRes_BUILD_VECTOR()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1326 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE()
1445 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
1675 if (VT.bitsLT(MVT::i32)) in allowsMisalignedMemoryAccesses()
H A DSIISelLowering.cpp1173 if (VT.bitsLT(MVT::i32)) in allowsMisalignedMemoryAccesses()
1313 VT.bitsLT(MemVT)) { in convertArgType()
3882 if (NewVT.bitsLT(MVT::i32)) { in ReplaceNodeResults()
6350 if (VT.bitsLT(Op.getValueType())) in getLoadExtOrTrunc()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMips64InstrInfo.td71 return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLT(MVT::i32);
H A DMipsISelLowering.cpp3792 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86FastISel.cpp3657 if (DstVT.bitsLT(SrcVT)) in fastSelectInstruction()
H A DX86ISelLowering.cpp2680 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
18659 if (Sign.getSimpleValueType().bitsLT(VT)) in LowerFCOPYSIGN()
24300 else if (EltVT.bitsLT(MVT::i32)) in LowerScalarVariableShift()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4950 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex()
H A DAArch64ISelLowering.cpp4522 if (SrcVT.bitsLT(VT)) in LowerFCOPYSIGN()
5990 if (SrcEltTy.bitsLT(SmallestEltTy)) { in ReconstructShuffle()