| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsBranchExpansion.cpp | 354 MIB.addMBB(MBBOpnd); in replaceBranch() 482 .addMBB(TgtMBB, MipsII::MO_ABS_HI) in expandToLongBranch() 483 .addMBB(BalTgtMBB); in expandToLongBranch() 491 .addMBB(BalTgtMBB); in expandToLongBranch() 590 .addMBB(TgtMBB, MipsII::MO_ABS_HI) in expandToLongBranch() 591 .addMBB(BalTgtMBB); in expandToLongBranch() 602 .addMBB(BalTgtMBB); in expandToLongBranch() 659 .addMBB(TgtMBB); in expandToLongBranch() 683 .addMBB(TgtMBB, MipsII::MO_HIGHER); in expandToLongBranch() 690 .addMBB(TgtMBB, MipsII::MO_ABS_HI); in expandToLongBranch() [all …]
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| H A D | Mips16ISelLowering.cpp | 553 .addMBB(sinkMBB); in emitSel16() 570 .addMBB(thisMBB) in emitSel16() 572 .addMBB(copy0MBB); in emitSel16() 617 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSelT16() 634 .addMBB(thisMBB) in emitSelT16() 636 .addMBB(copy0MBB); in emitSelT16() 683 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB); in emitSeliT16() 700 .addMBB(thisMBB) in emitSeliT16() 702 .addMBB(copy0MBB); in emitSeliT16() 722 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(BtOpc)).addMBB(target); in emitFEXT_T8I816_ins() [all …]
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| H A D | MipsExpandPseudo.cpp | 151 .addReg(Scratch2).addReg(ShiftCmpVal).addMBB(sinkMBB); in expandAtomicCmpSwapSubword() 171 .addMBB(loop1MBB); in expandAtomicCmpSwapSubword() 281 .addReg(Dest, RegState::Kill).addReg(OldVal).addMBB(exitMBB); in expandAtomicCmpSwap() 291 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB); in expandAtomicCmpSwap() 446 .addReg(StoreVal).addReg(Mips::ZERO).addMBB(loopMBB); in expandAtomicBinOpSubword() 609 BuildMI(loopMBB, DL, TII->get(BEQ)).addReg(Scratch).addReg(ZERO).addMBB(loopMBB); in expandAtomicBinOp()
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 193 .addMBB(LoopMBB); in doAtomicBinOpExpansion() 278 .addMBB(LoopMBB); in doMaskedAtomicBinOpExpansion() 396 .addMBB(LoopTailMBB); in expandAtomicMinMaxOp() 404 .addMBB(LoopTailMBB); in expandAtomicMinMaxOp() 411 .addMBB(LoopTailMBB); in expandAtomicMinMaxOp() 417 .addMBB(LoopTailMBB); in expandAtomicMinMaxOp() 437 .addMBB(LoopHeadMBB); in expandAtomicMinMaxOp() 493 .addMBB(DoneMBB); in expandAtomicCmpXchg() 503 .addMBB(LoopHeadMBB); in expandAtomicCmpXchg() 518 .addMBB(DoneMBB); in expandAtomicCmpXchg() [all …]
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| H A D | RISCVInstrInfo.cpp | 328 MachineInstr &MI = *BuildMI(&MBB, DL, get(RISCV::PseudoBR)).addMBB(TBB); in insertBranch() 337 *BuildMI(&MBB, DL, get(Opc)).add(Cond[1]).add(Cond[2]).addMBB(TBB); in insertBranch() 346 MachineInstr &MI = *BuildMI(&MBB, DL, get(RISCV::PseudoBR)).addMBB(FBB); in insertBranch() 380 .addMBB(&DestBB, RISCVII::MO_HI); in insertIndirectBranch() 383 .addMBB(&DestBB, RISCVII::MO_LO); in insertIndirectBranch()
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| /freebsd-12.1/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.cpp | 197 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(TBB); in insertBranch() 200 .addMBB(TBB); in insertBranch() 205 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB); in insertBranch() 206 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(FBB); in insertBranch()
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| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.cpp | 177 BuildMI(&MBB, DL, get(WebAssembly::BR)).addMBB(TBB); in insertBranch() 184 BuildMI(&MBB, DL, get(WebAssembly::BR_IF)).addMBB(TBB).add(Cond[1]); in insertBranch() 186 BuildMI(&MBB, DL, get(WebAssembly::BR_UNLESS)).addMBB(TBB).add(Cond[1]); in insertBranch() 191 BuildMI(&MBB, DL, get(WebAssembly::BR)).addMBB(FBB); in insertBranch()
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| H A D | WebAssemblyFixIrreducibleControlFlow.cpp | 297 MIB.addMBB(MBB); in run() 334 .addMBB(Dispatch); in run() 348 MIB.addMBB(MIB.getInstr() in run()
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| H A D | WebAssemblyLateEHPrepare.cpp | 170 .addMBB(TBB); in replaceFuncletReturns() 179 .addMBB(EHInfo->getThrowUnwindDest(&MBB)); in replaceFuncletReturns() 268 .addMBB(EHInfo->getThrowUnwindDest(&MBB)); in addRethrows()
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| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 357 .addMBB(UnCondBrIter->getOperand(0).getMBB()); in analyzeBranch() 359 .addMBB(TargetBB); in analyzeBranch() 414 auto &MI = *BuildMI(&MBB, DL, get(AVR::RJMPk)).addMBB(TBB); in insertBranch() 423 auto &CondMI = *BuildMI(&MBB, DL, getBrCond(CC)).addMBB(TBB); in insertBranch() 430 auto &MI = *BuildMI(&MBB, DL, get(AVR::RJMPk)).addMBB(FBB); in insertBranch() 568 auto &MI = *BuildMI(&MBB, DL, get(AVR::JMPk)).addMBB(&NewDestBB); in insertIndirectBranch()
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| H A D | AVRISelLowering.cpp | 1533 BuildMI(BB, dl, TII.get(AVR::BREQk)).addMBB(RemBB); in insertShift() 1542 .addMBB(BB) in insertShift() 1544 .addMBB(LoopBB); in insertShift() 1547 .addMBB(BB) in insertShift() 1549 .addMBB(LoopBB); in insertShift() 1564 .addMBB(BB) in insertShift() 1566 .addMBB(LoopBB); in insertShift() 1658 BuildMI(MBB, dl, TII.getBrCond(CC)).addMBB(trueMBB); in EmitInstrWithCustomInserter() 1659 BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(falseMBB); in EmitInstrWithCustomInserter() 1670 .addMBB(MBB) in EmitInstrWithCustomInserter() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86CondBrFolding.cpp | 232 .addMBB(NewDest); in replaceBrDest() 238 .addMBB(NewDest); in replaceBrDest() 259 .addMBB(MBBInfo->TBB); in fixupModifiedCond() 265 .addMBB(MBBInfo->FBB); in fixupModifiedCond() 328 .addMBB(RootMBBInfo->FBB); in optimizeCondBr() 333 .addMBB(TargetMBB); in optimizeCondBr()
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| H A D | ShadowCallStack.cpp | 146 BuildMI(MBB, MI, DL, TII->get(X86::JNE_1)).addMBB(&TrapBB); in addEpilog() 159 BuildMI(MBB, MI, DL, TII->get(X86::JNE_1)).addMBB(&TrapBB); in addEpilogLeaf() 186 BuildMI(MBB, MI, DL, TII->get(X86::JNE_1)).addMBB(&TrapBB); in addEpilogOnlyR10()
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| H A D | X86CmovConversion.cpp | 693 BuildMI(MBB, DL, TII->get(X86::GetCondBranchFromCond(CC))).addMBB(SinkMBB); in convertCmovInstsToBranches() 839 .addMBB(FalseMBB) in convertCmovInstsToBranches() 841 .addMBB(MBB); in convertCmovInstsToBranches()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUMachineCFGStructurizer.cpp | 1000 addMBB(MBB); in addMBBs() 1488 MIB.addMBB(SourceMBB); in shrinkPHI() 1500 MIB.addMBB(SourcePred); in shrinkPHI() 1532 MIB.addMBB(LastMerge); in replacePHI() 1542 MIB.addMBB(SourcePred); in replacePHI() 1581 MIB.addMBB(IfMBB); in replaceEntryPHI() 1775 MIB.addMBB(IfBB); in insertMergePHI() 1777 MIB.addMBB(CodeBB); in insertMergePHI() 2204 MIB.addMBB(Exit); in createEntryPHI() 2458 MIB.addMBB(Entry); in splitLoopPHI() [all …]
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| H A D | SIInsertSkips.cpp | 164 .addMBB(&NextBB); in skipIfDead() 320 .addMBB(DestBB); in skipMaskBranch() 507 .addMBB(EmptyMBBAtEnd); in runOnMachineFunction()
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| /freebsd-12.1/contrib/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 287 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB); in insertBranch() 292 .addMBB(TBB); in insertBranch() 301 .addMBB(TBB); in insertBranch() 302 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB); in insertBranch()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCBranchFinalize.cpp | 120 .addMBB(MI->getOperand(0).getMBB()) in replaceWithBRcc() 138 .addMBB(MI->getOperand(0).getMBB()) in replaceWithCmpBcc()
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| H A D | ARCInstrInfo.cpp | 371 BuildMI(&MBB, dl, get(ARC::BR)).addMBB(TBB); in insertBranch() 376 MIB.addMBB(TBB); in insertBranch() 387 BuildMI(&MBB, dl, get(ARC::BR)).addMBB(FBB); in insertBranch()
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| /freebsd-12.1/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 281 BuildMI(&MBB, DL, get(MSP430::JMP)).addMBB(TBB); in insertBranch() 287 BuildMI(&MBB, DL, get(MSP430::JCC)).addMBB(TBB).addImm(Cond[0].getImm()); in insertBranch() 292 BuildMI(&MBB, DL, get(MSP430::JMP)).addMBB(FBB); in insertBranch()
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| H A D | MSP430BranchSelector.cpp | 197 .addMBB(NextMBB) in expandBranches() 204 MI = BuildMI(*MBB, MI, dl, TII->get(MSP430::Bi)).addMBB(DestBB); in expandBranches()
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| H A D | MSP430ISelLowering.cpp | 1497 .addMBB(RemBB) in EmitShiftInstr() 1506 .addReg(SrcReg).addMBB(BB) in EmitShiftInstr() 1507 .addReg(ShiftReg2).addMBB(LoopBB); in EmitShiftInstr() 1509 .addReg(ShiftAmtSrcReg).addMBB(BB) in EmitShiftInstr() 1510 .addReg(ShiftAmtReg2).addMBB(LoopBB); in EmitShiftInstr() 1524 .addMBB(LoopBB) in EmitShiftInstr() 1530 .addReg(SrcReg).addMBB(BB) in EmitShiftInstr() 1531 .addReg(ShiftReg2).addMBB(LoopBB); in EmitShiftInstr() 1583 .addMBB(copy1MBB) in EmitInstrWithCustomInserter() 1600 .addMBB(copy0MBB) in EmitInstrWithCustomInserter() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 256 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); in insertBranch() 264 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); in insertBranch() 266 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); in insertBranch() 270 BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB); in insertBranch()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 195 InsertedPHI.addReg(PredValues[i].second).addMBB(PredValues[i].first); in GetValueInMiddleOfBlock() 317 MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred); in AddPHIOperand()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMConstantIslandPass.cpp | 925 BuildMI(OrigBB, DebugLoc(), TII->get(Opc)).addMBB(NewBB); in splitBlockBeforeInstr() 928 .addMBB(NewBB) in splitBlockBeforeInstr() 1323 BuildMI(UserMBB, DebugLoc(), TII->get(UncondBr)).addMBB(NewMBB); in createNewWater() 1326 .addMBB(NewMBB) in createNewWater() 1738 .addMBB(NextBB).addImm(CC).addReg(CCReg); in fixupConditionalBr() 1743 .addMBB(DestBB) in fixupConditionalBr() 1746 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); in fixupConditionalBr() 1917 .addReg(Reg).addMBB(DestBB,Br.MI->getOperand(0).getTargetFlags()); in optimizeThumb2Branches() 2375 .addMBB(BB) in adjustJTTargetBlockForward() 2379 .addMBB(BB) in adjustJTTargetBlockForward()
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