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Searched refs:ValueTypeByHwMode (Results 1 – 14 of 14) sorted by relevance

/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DInfoByHwMode.cpp33 ValueTypeByHwMode::ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH) { in ValueTypeByHwMode() function in ValueTypeByHwMode
42 bool ValueTypeByHwMode::operator== (const ValueTypeByHwMode &T) const { in operator ==()
53 bool ValueTypeByHwMode::operator< (const ValueTypeByHwMode &T) const { in operator <()
59 MVT &ValueTypeByHwMode::getOrCreateTypeForMode(unsigned Mode, MVT Type) { in getOrCreateTypeForMode()
72 StringRef ValueTypeByHwMode::getMVTName(MVT T) { in getMVTName()
78 void ValueTypeByHwMode::writeToStream(raw_ostream &OS) const { in writeToStream()
101 void ValueTypeByHwMode::dump() const { in dump()
105 ValueTypeByHwMode llvm::getValueTypeByHwMode(Record *Rec, in getValueTypeByHwMode()
114 return ValueTypeByHwMode(Rec, CGH); in getValueTypeByHwMode()
115 return ValueTypeByHwMode(llvm::getValueType(Rec)); in getValueTypeByHwMode()
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H A DInfoByHwMode.h121 struct ValueTypeByHwMode : public InfoByHwMode<MVT> { struct
122 ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH);
123 ValueTypeByHwMode(MVT T) { Map.insert({DefaultMode,T}); } in ValueTypeByHwMode() function
124 ValueTypeByHwMode() = default;
126 bool operator== (const ValueTypeByHwMode &T) const;
127 bool operator< (const ValueTypeByHwMode &T) const;
140 ValueTypeByHwMode getValueTypeByHwMode(Record *Rec, argument
178 raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T);
H A DCodeGenTarget.h56 mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes;
122 std::vector<ValueTypeByHwMode> getRegisterVTs(Record *R) const;
124 ArrayRef<ValueTypeByHwMode> getLegalValueTypes() const { in getLegalValueTypes()
H A DCodeGenDAGPatterns.h198 : TypeSetByHwMode(ValueTypeByHwMode(VT)) {} in TypeSetByHwMode()
199 TypeSetByHwMode(ValueTypeByHwMode VT) in TypeSetByHwMode()
200 : TypeSetByHwMode(ArrayRef<ValueTypeByHwMode>(&VT, 1)) {} in TypeSetByHwMode()
201 TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList);
210 ValueTypeByHwMode getValueTypeByHwMode() const;
230 bool insert(const ValueTypeByHwMode &VVT);
258 ValueTypeByHwMode getConcrete(const TypeSetByHwMode &VTS, in getConcrete()
302 const ValueTypeByHwMode &VVT);
403 ValueTypeByHwMode VVT;
686 ValueTypeByHwMode getType(unsigned ResNo) const { in getType()
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H A DCodeGenRegisters.h328 SmallVector<ValueTypeByHwMode, 4> VTs;
348 ArrayRef<ValueTypeByHwMode> getValueTypes() const { return VTs; } in getValueTypes()
351 const ValueTypeByHwMode &getValueTypeNum(unsigned VTNum) const { in getValueTypeNum()
H A DCodeGenTarget.cpp294 std::vector<ValueTypeByHwMode> CodeGenTarget::getRegisterVTs(Record *R) in getRegisterVTs()
297 std::vector<ValueTypeByHwMode> Result; in getRegisterVTs()
300 ArrayRef<ValueTypeByHwMode> InVTs = RC.getValueTypes(); in getRegisterVTs()
H A DDAGISelMatcherGen.cpp36 const ValueTypeByHwMode &VVT = RC.getValueTypeNum(0); in getRegisterValueType()
44 const ValueTypeByHwMode &T = RC.getValueTypeNum(0); in getRegisterValueType()
H A DCodeGenDAGPatterns.cpp70 TypeSetByHwMode::TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList) { in TypeSetByHwMode()
71 for (const ValueTypeByHwMode &VVT : VTList) in TypeSetByHwMode()
85 ValueTypeByHwMode TypeSetByHwMode::getValueTypeByHwMode() const { in getValueTypeByHwMode()
88 ValueTypeByHwMode VVT; in getValueTypeByHwMode()
103 bool TypeSetByHwMode::insert(const ValueTypeByHwMode &VVT) { in insert()
203 OS << ValueTypeByHwMode::getMVTName(Types[i]); in writeToStream()
599 const ValueTypeByHwMode &VVT) { in EnforceVectorEltTypeIs()
2291 ValueTypeByHwMode VVT = TP.getInfer().getConcrete(Types[0], false); in ApplyTypeConstraints()
H A DRegisterInfoEmitter.cpp1237 for (const ValueTypeByHwMode &VVT : RC.VTs) in runTargetDesc()
1286 for (const ValueTypeByHwMode &VVT : RC.VTs) in runTargetDesc()
H A DCodeGenInstruction.cpp426 const std::vector<ValueTypeByHwMode> &RegVTs = in HasOneImplicitDefWithKnownVT()
H A DFastISelEmitter.cpp174 ValueTypeByHwMode VVT = TP->getTree(0)->getType(0); in emitImmediatePredicate()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td286 def VecI1: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
288 def VecI8: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
290 def VecI16: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
292 def VecI32: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
295 def VecPI8: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
297 def VecPI16: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
299 def VecPI32: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
302 def VecQ8: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
304 def VecQ16: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
306 def VecQ32: ValueTypeByHwMode<[Hvx64, Hvx128, DefaultMode],
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td87 def XLenVT : ValueTypeByHwMode<[RV32, RV64, DefaultMode],
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTarget.td53 class ValueTypeByHwMode<list<HwMode> Ms, list<ValueType> Ts>