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Searched refs:UseMI (Results 1 – 25 of 57) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp191 MI.getParent() != UseMI.getParent()) in canRemoveAddasl()
197 getBaseWithLongOffset(UseMI) < 0) in canRemoveAddasl()
205 for (auto &Mo : UseMI.operands()) in canRemoveAddasl()
402 Changed |= updateAddUses(AddMI, UseMI); in processAddUses()
416 const MCInstrDesc &MID = UseMI->getDesc(); in updateAddUses()
641 MIB.add(UseMI->getOperand(0)); in changeAddAsl()
654 MIB.add(UseMI->getOperand(2)); in changeAddAsl()
660 MIB.add(UseMI->getOperand(i)); in changeAddAsl()
662 Deleted.insert(UseMI); in changeAddAsl()
672 const MCInstrDesc &MID = UseMI->getDesc(); in xformUseMI()
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H A DHexagonConstExtenders.cpp318 MachineInstr *UseMI = nullptr; member
331 return UseMI->getOperand(OpNum); in getOp()
1112 if (!ED.UseMI->mayLoad() && !ED.UseMI->mayStore()) in getOffsetRange()
1217 ED.UseMI = &MI; in recordExtender()
1490 RefMIs.insert(ED0.UseMI); in calculatePlacement()
1495 RefMIs.insert(ED.UseMI); in calculatePlacement()
1584 MachineInstr &MI = *ED.UseMI; in replaceInstrExact()
1702 MachineInstr &MI = *ED.UseMI; in replaceInstrExpr()
1839 const MachineInstr &MI = *ED.UseMI; in replaceInstr()
1965 const MachineInstr *MA = A.UseMI; in runOnMachineFunction()
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp32 MachineInstr *UseMI; member
93 MachineInstr *UseMI,
139 unsigned Opc = UseMI.getOpcode(); in isInlineConstantIfFolded()
170 MachineInstr *MI = Fold.UseMI; in updateOperand()
275 if (Candidate.UseMI == MI) in isUseMIInFoldList()
398 MachineInstr *UseMI, in foldOperand() argument
428 if (UseMI->isRegSequence()) { in foldOperand()
450 if (FoldingImm && UseMI->isCopy()) { in foldOperand()
486 UseMI->setDesc(TII->get(MovOp)); in foldOperand()
487 CopiesToReplace.push_back(UseMI); in foldOperand()
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H A DSIFixSGPRCopies.cpp209 const auto *UseMI = MO.getParent(); in tryChangeVGPRtoSGPRinCopy() local
210 if (UseMI == &MI) in tryChangeVGPRtoSGPRinCopy()
212 if (MO.isDef() || UseMI->getParent() != MI.getParent() || in tryChangeVGPRtoSGPRinCopy()
213 UseMI->getOpcode() <= TargetOpcode::GENERIC_OP_END || in tryChangeVGPRtoSGPRinCopy()
214 !TII->isOperandLegal(*UseMI, UseMI->getOperandNo(&MO), &Src)) in tryChangeVGPRtoSGPRinCopy()
H A DSIInstrInfo.cpp2023 UseMI.setDesc(get(NewOpc)); in FoldImmediate()
2025 UseMI.addImplicitDefUseOperands(*UseMI.getParent()->getParent()); in FoldImmediate()
2066 UseMI.RemoveOperand( in FoldImmediate()
2068 UseMI.RemoveOperand( in FoldImmediate()
2079 UseMI.untieRegOperand( in FoldImmediate()
2139 UseMI.RemoveOperand( in FoldImmediate()
2141 UseMI.RemoveOperand( in FoldImmediate()
2146 UseMI.untieRegOperand( in FoldImmediate()
3622 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(), in readlaneVGPRToSGPR()
3631 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(), in readlaneVGPRToSGPR()
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/freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp132 MachineInstr &UseMI = *UseMO.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse() local
134 MachineBasicBlock *InsertBB = UseMI.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse()
137 if (UseMI.isPHI()) { in InsertInsnsWithoutSideEffectsBeforeUse()
197 if (UseMI.getOpcode() == TargetOpcode::G_SEXT || in tryCombineExtendingLoads()
198 UseMI.getOpcode() == TargetOpcode::G_ZEXT || in tryCombineExtendingLoads()
199 UseMI.getOpcode() == TargetOpcode::G_ANYEXT) { in tryCombineExtendingLoads()
202 UseMI.getOpcode(), &UseMI); in tryCombineExtendingLoads()
229 MachineInstr *UseMI = UseMO.getParent(); in tryCombineExtendingLoads() local
233 if (UseMI->getOpcode() == Preferred.ExtendOpcode || in tryCombineExtendingLoads()
234 UseMI->getOpcode() == TargetOpcode::G_ANYEXT) { in tryCombineExtendingLoads()
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/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DMachineTraceMetrics.cpp655 if (UseMI.isDebugInstr()) in getDataDeps()
660 E = UseMI.operands_end(); I != E; ++I) { in getDataDeps()
688 assert(UseMI.isPHI() && UseMI.getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
746 LRU.MI = UseMI; in updatePhysDepsDownwards()
787 if (UseMI.isPHI()) in updateDepth()
788 getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI); in updateDepth()
789 else if (getDataDeps(UseMI, Deps, MTM.MRI)) in updateDepth()
809 InstrCycles &MICycles = Cycles[&UseMI]; in updateDepth()
884 for (const auto &UseMI : *MBB) { in computeInstrDepths()
885 updateDepth(TBI, UseMI, RegUnits); in computeInstrDepths()
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H A DLiveRangeEdit.cpp188 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
200 if (UseMI && UseMI != MI) in foldAsLoad()
205 UseMI = MI; in foldAsLoad()
208 if (!DefMI || !UseMI) in foldAsLoad()
214 LIS.getInstructionIndex(*UseMI))) in foldAsLoad()
224 << " into single use: " << *UseMI); in foldAsLoad()
227 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) in foldAsLoad()
230 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS); in foldAsLoad()
234 LIS.ReplaceMachineInstrInMaps(*UseMI, *FoldMI); in foldAsLoad()
235 UseMI->eraseFromParent(); in foldAsLoad()
H A DTargetSchedule.cpp187 const MachineInstr *UseMI, unsigned UseOperIdx) const { in computeOperandLatency() argument
194 if (UseMI) { in computeOperandLatency()
196 *UseMI, UseOperIdx); in computeOperandLatency()
226 if (!UseMI) in computeOperandLatency()
230 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
233 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency()
H A DRegisterScavenging.cpp310 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
367 UseMI = RestorePointMI; in findSurvivorReg()
463 MachineBasicBlock::iterator &UseMI) { in spill() argument
508 if (!TRI->saveScavengerRegister(*MBB, Before, UseMI, &RC, Reg)) { in spill()
525 TII->loadRegFromStackSlot(*MBB, UseMI, Reg, Scavenged[SI].FrameIndex, in spill()
527 II = std::prev(UseMI); in spill()
559 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
560 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
568 ScavengedInfo &Scavenged = spill(SReg, *RC, SPAdj, I, UseMI); in scavengeRegister()
569 Scavenged.Restore = &*std::prev(UseMI); in scavengeRegister()
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H A DMachineLICM.cpp972 if (UseMI.mayStore() && isInvariantStore(UseMI, TRI, MRI)) in isCopyFeedingInvariantStore()
1068 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in HasLoopPHIUse()
1070 if (UseMI.isPHI()) { in HasLoopPHIUse()
1073 if (CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1078 if (isExitBlock(UseMI.getParent())) in HasLoopPHIUse()
1083 if (UseMI.isCopy() && CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1084 Work.push_back(&UseMI); in HasLoopPHIUse()
1099 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in HasHighOperandLatency()
1100 if (UseMI.isCopyLike()) in HasHighOperandLatency()
1102 if (!CurLoop->contains(UseMI.getParent())) in HasHighOperandLatency()
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H A DDetectDeadLanes.cpp424 const MachineInstr &UseMI = *MO.getParent(); in determineInitialUsedLanes() local
425 if (UseMI.isKill()) in determineInitialUsedLanes()
429 if (lowersToCopies(UseMI)) { in determineInitialUsedLanes()
430 assert(UseMI.getDesc().getNumDefs() == 1); in determineInitialUsedLanes()
431 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes()
438 if (lowersToCopies(UseMI)) { in determineInitialUsedLanes()
440 CrossCopy = isCrossCopy(*MRI, UseMI, DstRC, MO); in determineInitialUsedLanes()
442 LLVM_DEBUG(dbgs() << "Copy across incompatible classes: " << UseMI); in determineInitialUsedLanes()
H A DOptimizePHIs.cpp158 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DstReg)) { in IsDeadPHICycle()
159 if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle)) in IsDeadPHICycle()
H A DRegisterCoalescer.cpp796 MachineInstr *UseMI = MO.getParent(); in removeCopyByCommutingDef() local
846 if (UseMI->isDebugValue()) { in removeCopyByCommutingDef()
863 if (UseMI == CopyMI) in removeCopyByCommutingDef()
865 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
868 UseMI->getOperand(0).getSubReg()) in removeCopyByCommutingDef()
889 deleteInstr(UseMI); in removeCopyByCommutingDef()
1452 if (UseMI->isDebugValue()) { in reMaterializeTrivialDef()
1459 MBB->splice(std::next(NewMI.getIterator()), UseMI->getParent(), UseMI); in reMaterializeTrivialDef()
1643 MachineInstr *UseMI = &*(I++); in updateRegDefsUses() local
1695 if (!UseMI->isDebugValue()) in updateRegDefsUses()
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H A DMachineSSAUpdater.cpp225 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
227 if (UseMI->isPHI()) { in RewriteUse()
228 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
H A DTailDuplicator.cpp213 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate() local
215 if (UseMI->isDebugValue()) { in tailDuplicateAndUpdate()
220 UseMI->eraseFromParent(); in tailDuplicateAndUpdate()
223 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in tailDuplicateAndUpdate()
291 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in isDefLiveOut()
292 if (UseMI.isDebugValue()) in isDefLiveOut()
294 if (UseMI.getParent() != BB) in isDefLiveOut()
H A DPeepholeOptimizer.cpp501 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() local
502 if (UseMI == &MI) in INITIALIZE_PASS_DEPENDENCY()
505 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
531 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
534 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
537 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
574 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
575 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
586 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
1859 for (const MachineInstr &UseMI : MRI.use_nodbg_instructions(DefOp.getReg())) { in getNextSourceFromBitcast() local
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/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp124 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg() local
125 if (UseMI->getParent() != MBB) in getDefReg()
128 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
129 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
133 UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg()
134 if (UseMI->getParent() != MBB) in getDefReg()
H A DThumbRegisterInfo.cpp454 MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, in saveScavengerRegister() argument
459 return ARMBaseRegisterInfo::saveScavengerRegister(MBB, I, UseMI, RC, Reg); in saveScavengerRegister()
477 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) { in saveScavengerRegister()
484 UseMI = II; in saveScavengerRegister()
492 UseMI = II; in saveScavengerRegister()
499 BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)) in saveScavengerRegister()
H A DARMBaseInstrInfo.h309 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg,
317 const MachineInstr &UseMI,
373 const MachineInstr &UseMI, unsigned UseIdx,
388 const MachineInstr &UseMI,
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp680 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
681 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
693 LLVM_DEBUG(UseMI.dump()); in recordUnoptimizableWebs()
723 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
724 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
765 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
766 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval()
770 LLVM_DEBUG(UseMI.dump()); in markSwapsForRemoval()
H A DPPCInstrInfo.cpp201 if (UseMI.isBranch() && IsRegCR) { in getOperandLatency()
1325 const MCInstrDesc &UseMCID = UseMI.getDesc(); in FoldImmediate()
1333 if (UseMI.getOperand(UseIdx).isReg() && in FoldImmediate()
1334 UseMI.getOperand(UseIdx).getReg() == Reg) in FoldImmediate()
1369 UseMI.getOperand(UseIdx).setReg(ZeroReg); in FoldImmediate()
1680 MachineInstr *UseMI = &*I; in optimizeCompareInstr() local
1681 if (UseMI->getOpcode() == PPC::BCC) { in optimizeCompareInstr()
1687 } else if (UseMI->getOpcode() == PPC::ISEL || in optimizeCompareInstr()
1744 if (UseMI->getOpcode() != PPC::BCC) in optimizeCompareInstr()
1859 MachineInstr *UseMI = &*I; in optimizeCompareInstr() local
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/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMips16RegisterInfo.cpp60 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
66 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); in saveScavengerRegister()
H A DMips16RegisterInfo.h34 MachineBasicBlock::iterator &UseMI,
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DRegisterScavenging.h210 MachineBasicBlock::iterator &UseMI);
222 MachineBasicBlock::iterator &UseMI);

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