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Searched refs:TargetRegisterInfo (Results 1 – 25 of 409) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp43 TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID, in TargetRegisterInfo() function in TargetRegisterInfo
57 TargetRegisterInfo::~TargetRegisterInfo() = default;
95 else if (TargetRegisterInfo::isStackSlot(Reg)) in printReg()
96 OS << "SS#" << TargetRegisterInfo::stackSlot2Index(Reg); in printReg()
97 else if (TargetRegisterInfo::isVirtualRegister(Reg)) { in printReg()
102 OS << '%' << TargetRegisterInfo::virtReg2Index(Reg); in printReg()
148 OS << '%' << TargetRegisterInfo::virtReg2Index(Unit); in printVRegOrUnit()
287 const TargetRegisterClass *TargetRegisterInfo::
392 TargetRegisterInfo::getRegAllocationHints(unsigned VirtReg, in getRegAllocationHints()
441 bool TargetRegisterInfo::needsStackRealignment( in needsStackRealignment()
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H A DDetectDeadLanes.cpp111 const TargetRegisterInfo *TRI;
165 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in isCrossCopy()
199 if (!TargetRegisterInfo::isVirtualRegister(MOReg)) in addUsedLanesOnOperand()
290 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in transferDefinedLanesStep()
364 unsigned RegIdx = TargetRegisterInfo::virtReg2Index(Reg); in determineInitialDefinedLanes()
386 if (TargetRegisterInfo::isPhysicalRegister(MOReg)) { in determineInitialDefinedLanes()
391 assert(TargetRegisterInfo::isVirtualRegister(MOReg)); in determineInitialDefinedLanes()
435 if (TargetRegisterInfo::isVirtualRegister(DefReg)) { in determineInitialUsedLanes()
475 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in isUndefInput()
487 if (TargetRegisterInfo::isVirtualRegister(MOReg)) { in isUndefInput()
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H A DInterferenceCache.h31 class TargetRegisterInfo; variable
118 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
121 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
126 const TargetRegisterInfo *TRI,
142 const TargetRegisterInfo *TRI = nullptr;
174 const TargetRegisterInfo *tri);
H A DRegisterCoalescer.h22 class TargetRegisterInfo; variable
28 const TargetRegisterInfo &TRI;
59 CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {} in CoalescerPair()
64 const TargetRegisterInfo &tri) in CoalescerPair()
H A DRegAllocFast.cpp73 const TargetRegisterInfo *TRI;
94 return TargetRegisterInfo::virtReg2Index(VirtReg); in getSparseSetIndex()
339 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in killVirtReg()
350 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in spillVirtReg()
565 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in allocVirtReg()
573 if (TargetRegisterInfo::isPhysicalRegister(Hint) && in allocVirtReg()
630 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in defineVirtReg()
746 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in handleThroughOperands()
899 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in allocateInstruction()
993 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in allocateInstruction()
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H A DMachineRegisterInfo.cpp206 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in clearVirtRegs()
259 verifyUseList(TargetRegisterInfo::index2VirtReg(i)); in verifyUseLists()
384 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in replaceRegWith()
390 if (TargetRegisterInfo::isPhysicalRegister(ToReg)) { in replaceRegWith()
495 assert(TargetRegisterInfo::isVirtualRegister(Reg)); in getMaxLaneMaskForVReg()
514 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg)); in isConstantPhysReg()
516 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isConstantPhysReg()
531 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isCallerPreservedOrConstPhysReg()
584 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegModified()
598 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegUsed()
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H A DVirtRegMap.cpp85 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys()
86 TargetRegisterInfo::isPhysicalRegister(physReg)); in assignVirt2Phys()
107 if (TargetRegisterInfo::isVirtualRegister(Hint)) in hasPreferredPhys()
114 if (TargetRegisterInfo::isPhysicalRegister(Hint.second)) in hasKnownPreference()
116 if (TargetRegisterInfo::isVirtualRegister(Hint.second)) in hasKnownPreference()
122 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
130 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
142 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in print()
151 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in print()
179 const TargetRegisterInfo *TRI;
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H A DLivePhysRegs.cpp51 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) in removeDefs()
65 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) in addUses()
91 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) in stepForward()
251 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in computeLiveIns()
262 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in addLiveIns()
283 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in recomputeLivenessFlags()
299 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); in recomputeLivenessFlags()
316 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); in recomputeLivenessFlags()
H A DMachineCopyPropagation.cpp90 const TargetRegisterInfo &TRI) { in markRegsUnavailable()
102 void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) { in clobberRegister()
120 void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) { in trackCopy()
144 MachineInstr *findCopyForUnit(unsigned RegUnit, const TargetRegisterInfo &TRI, in findCopyForUnit()
155 const TargetRegisterInfo &TRI) { in findAvailCopy()
185 const TargetRegisterInfo *TRI;
253 unsigned Def, const TargetRegisterInfo *TRI) { in isNopCopy()
463 assert(!TargetRegisterInfo::isVirtualRegister(Def) && in CopyPropagateBlock()
464 !TargetRegisterInfo::isVirtualRegister(Src) && in CopyPropagateBlock()
556 assert(!TargetRegisterInfo::isVirtualRegister(Reg) && in CopyPropagateBlock()
H A DMachineCSE.cpp63 const TargetRegisterInfo *TRI;
154 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in INITIALIZE_PASS_DEPENDENCY()
161 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) in INITIALIZE_PASS_DEPENDENCY()
269 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses()
287 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses()
360 if (TargetRegisterInfo::isVirtualRegister(MOReg)) in PhysRegDefsReach()
415 if (TargetRegisterInfo::isVirtualRegister(CSReg) && in isProfitableToCSE()
416 TargetRegisterInfo::isVirtualRegister(Reg)) { in isProfitableToCSE()
446 TargetRegisterInfo::isVirtualRegister(MO.getReg())) { in isProfitableToCSE()
596 assert(TargetRegisterInfo::isVirtualRegister(OldReg) && in ProcessBlock()
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H A DTargetInstrInfo.cpp46 const TargetRegisterInfo *TRI, in getRegClass()
224 if (TargetRegisterInfo::isPhysicalRegister(Reg1)) in commuteInstructionImpl()
226 if (TargetRegisterInfo::isPhysicalRegister(Reg2)) in commuteInstructionImpl()
441 assert(TargetRegisterInfo::isVirtualRegister(FoldReg) && in canFoldCopy()
806 if (TargetRegisterInfo::isVirtualRegister(RegA)) in reassociateOps()
808 if (TargetRegisterInfo::isVirtualRegister(RegB)) in reassociateOps()
810 if (TargetRegisterInfo::isVirtualRegister(RegX)) in reassociateOps()
812 if (TargetRegisterInfo::isVirtualRegister(RegY)) in reassociateOps()
814 if (TargetRegisterInfo::isVirtualRegister(RegC)) in reassociateOps()
888 if (TargetRegisterInfo::isVirtualRegister(DefReg) && in isReallyTriviallyReMaterializableGeneric()
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/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DMachineInstr.h55 class TargetRegisterInfo; variable
1114 const TargetRegisterInfo *TRI = nullptr) const {
1135 const TargetRegisterInfo *TRI = nullptr) const {
1144 const TargetRegisterInfo *TRI = nullptr) const {
1183 const TargetRegisterInfo *TRI = nullptr) const {
1231 const TargetRegisterInfo *TRI) const;
1247 const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
1262 const TargetRegisterInfo *TRI) const;
1310 const TargetRegisterInfo &RegInfo);
1317 const TargetRegisterInfo *RegInfo,
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H A DVirtRegMap.h45 const TargetRegisterInfo *TRI;
89 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; } in getTargetRegInfo()
102 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys()
113 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in clearVirt()
165 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getStackSlot()
H A DLiveRegUnits.h32 const TargetRegisterInfo *TRI = nullptr;
40 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
51 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
58 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) in accumulateUsedDefed()
75 void init(const TargetRegisterInfo &TRI) { in init()
H A DTargetRegisterInfo.h220 class TargetRegisterInfo : public MCRegisterInfo {
240 TargetRegisterInfo(const TargetRegisterInfoDesc *ID,
248 virtual ~TargetRegisterInfo();
627 const TargetRegisterInfo* TRI = nullptr);
1032 const TargetRegisterInfo *TRI,
1132 BitMaskClassIterator(const uint32_t *Mask, const TargetRegisterInfo &TRI) in BitMaskClassIterator()
1155 return TargetRegisterInfo::virtReg2Index(Reg); in operator()
1169 Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI = nullptr,
1181 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI);
1185 Printable printVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI);
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/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/
H A DRegisterBank.h24 class TargetRegisterInfo; variable
66 bool verify(const TargetRegisterInfo &TRI) const;
82 void dump(const TargetRegisterInfo *TRI = nullptr) const;
90 const TargetRegisterInfo *TRI = nullptr) const;
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp59 const TargetRegisterInfo *RegInfo = st.getRegisterInfo(); in copyPhysReg()
82 const TargetRegisterInfo *TRI) const { in storeRegToStackSlot()
84 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot()
88 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot()
111 const TargetRegisterInfo *TRI) const { in loadRegFromStackSlot()
113 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot()
117 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot()
H A DMLxExpansionPass.cpp52 const TargetRegisterInfo *TRI;
91 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in getAccDefMI()
101 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI()
107 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI()
119 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg()
130 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg()
145 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in hasLoopHazard()
159 if (TargetRegisterInfo::isVirtualRegister(SrcReg)) { in hasLoopHazard()
167 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard()
173 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard()
/freebsd-12.1/contrib/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.h33 class TargetRegisterInfo; variable
146 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
173 bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
236 bool addMachineRegExpression(const TargetRegisterInfo &TRI,
260 bool isFrameRegister(const TargetRegisterInfo &TRI,
277 bool isFrameRegister(const TargetRegisterInfo &TRI,
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DRDFRegisters.h99 PhysicalRegisterInfo(const TargetRegisterInfo &tri,
103 return TargetRegisterInfo::isStackSlot(R); in isRegMaskId()
107 return TargetRegisterInfo::index2StackSlot(RegMasks.find(RM)); in getRegMaskId()
111 return RegMasks.get(TargetRegisterInfo::stackSlot2Index(R)); in getRegMaskBits()
129 return MaskInfos[TargetRegisterInfo::stackSlot2Index(MaskId)].Units; in getMaskUnits()
133 const TargetRegisterInfo &getTRI() const { return TRI; } in getTRI()
147 const TargetRegisterInfo &TRI;
H A DHexagonPeephole.cpp143 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
144 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
192 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
193 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
214 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
215 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
246 if (TargetRegisterInfo::isVirtualRegister(Reg0)) { in runOnMachineFunction()
H A DHexagonBlockRanges.h29 class TargetRegisterInfo; variable
148 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
151 PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I) in PrintRangeMap()
158 const TargetRegisterInfo &TRI;
163 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
171 const TargetRegisterInfo &TRI;
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h40 class TargetRegisterInfo; variable
117 const TargetRegisterInfo *TRI) const override { in storeRegToStackSlot()
125 const TargetRegisterInfo *TRI) const override { in loadRegFromStackSlot()
133 const TargetRegisterInfo *TRI,
140 const TargetRegisterInfo *TRI,
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp268 if (TargetRegisterInfo::isVirtualRegister(Dest->getReg()) && in shrinkScalarLogicOp()
300 if (TargetRegisterInfo::isPhysicalRegister(Reg) && in instAccessReg()
301 TargetRegisterInfo::isPhysicalRegister(MO.getReg())) { in instAccessReg()
305 TargetRegisterInfo::isVirtualRegister(Reg)) { in instAccessReg()
331 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in getSubRegForIndex()
548 if (TargetRegisterInfo::isVirtualRegister(Dest->getReg()) && in runOnMachineFunction()
578 TargetRegisterInfo::isPhysicalRegister(Dst.getReg())) { in runOnMachineFunction()
619 if (TargetRegisterInfo::isVirtualRegister(DstReg)) { in runOnMachineFunction()
643 if (TargetRegisterInfo::isVirtualRegister(SReg)) { in runOnMachineFunction()
661 if (TargetRegisterInfo::isVirtualRegister(SDst->getReg())) in runOnMachineFunction()
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H A DGCNRegPressure.cpp44 const unsigned Reg = TargetRegisterInfo::index2VirtReg(I); in printLivesAt()
87 assert(TargetRegisterInfo::isVirtualRegister(Reg)); in getRegKind()
196 TargetRegisterInfo::isVirtualRegister(MO.getReg())); in getDefRegMask()
210 TargetRegisterInfo::isVirtualRegister(MO.getReg())); in getUsedRegMask()
231 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in collectVirtualRegUses()
277 auto Reg = TargetRegisterInfo::index2VirtReg(I); in getLiveRegs()
328 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg()) || in recede()
408 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in advanceToNext()
444 const TargetRegisterInfo *TRI) { in reportMismatch()
497 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); in printLiveRegs()
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