| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | LiveVariables.cpp | 197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in FindLastPartialDef() local
221 SubRegs.isValid(); ++SubRegs) in FindLastPartialDef()
251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegUse() local
275 SubRegs.isValid(); ++SubRegs) in HandlePhysRegUse()
290 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in FindLastRefOrPartRef() local
339 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegKill() local
370 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegKill() local
449 SubRegs.isValid(); ++SubRegs) in HandlePhysRegDef()
452 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegDef() local
474 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegDef() local
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| H A D | CriticalAntiDepBreaker.cpp | 233 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction() local
234 SubRegs.isValid(); ++SubRegs) { in PrescanInstruction()
235 KeepRegs.set(*SubRegs); in PrescanInstruction()
245 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction() local
246 SubRegs.isValid(); ++SubRegs) in PrescanInstruction()
247 KeepRegs.set(*SubRegs); in PrescanInstruction()
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| H A D | MachineInstrBundle.cpp | 199 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in finalizeBundle() local
200 unsigned SubReg = *SubRegs; in finalizeBundle()
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| H A D | MachineVerifier.cpp | 127 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in addRegWithSubRegs() local
128 RV.push_back(*SubRegs); in addRegWithSubRegs()
803 SubRegs.isValid(); ++SubRegs) in visitMachineBasicBlockBefore()
804 regsLive.insert(*SubRegs); in visitMachineBasicBlockBefore()
812 SubRegs.isValid(); ++SubRegs) in visitMachineBasicBlockBefore()
813 regsLive.insert(*SubRegs); in visitMachineBasicBlockBefore()
1616 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); in checkLiveness() local
1617 ++SubRegs) { in checkLiveness()
1636 for (MCSubRegIterator SubRegs(MOP.getReg(), TRI); SubRegs.isValid(); in checkLiveness() local
1637 ++SubRegs) { in checkLiveness()
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| H A D | AggressiveAntiDepBreaker.cpp | 257 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in GetPassthruRegs() local
258 SubRegs.isValid(); ++SubRegs) in GetPassthruRegs()
259 PassthruRegs.insert(*SubRegs); in GetPassthruRegs()
335 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandleLastUse() local
336 unsigned SubregReg = *SubRegs; in HandleLastUse()
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| H A D | RegisterScavenging.cpp | 224 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in forward() local
225 if (isRegUsed(*SubRegs)) { in forward()
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| H A D | IfConversion.cpp | 1833 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in IfConvertDiamondCommon() local
1834 SubRegs.isValid(); ++SubRegs) in IfConvertDiamondCommon()
1835 ExtUses.insert(*SubRegs); in IfConvertDiamondCommon()
1841 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in IfConvertDiamondCommon() local
1842 SubRegs.isValid(); ++SubRegs) in IfConvertDiamondCommon()
1843 RedefsByFalse.insert(*SubRegs); in IfConvertDiamondCommon()
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| H A D | BranchFolding.cpp | 1974 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in findHoistingInsertPosAndDeps() local
1975 Uses.erase(*SubRegs); // Use sub-registers to be conservative in findHoistingInsertPosAndDeps()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 83 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in addReg()
84 SubRegs.isValid(); ++SubRegs) in addReg()
85 LiveRegs.insert(*SubRegs); in addReg()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterInfo.cpp | 31 static const unsigned SubRegs[] = { in getSubRegFromChannel() local
38 assert(Channel < array_lengthof(SubRegs)); in getSubRegFromChannel()
39 return SubRegs[Channel]; in getSubRegFromChannel()
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 258 for (const auto &SubReg : SubRegs) { in inheritRegUnits()
271 return SubRegs; in computeSubRegs()
300 if (!SubRegs.insert(SR).second) in computeSubRegs()
313 CodeGenRegister *SR = SubRegs[Idx]; in computeSubRegs()
351 CodeGenRegister *SR = SubRegs[Idx]; in computeSubRegs()
359 for (const auto &SubReg : SubRegs) { in computeSubRegs()
450 return SubRegs; in computeSubRegs()
555 for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end(); in computeSuperRegs()
562 for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end(); in computeSuperRegs()
587 for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end(); in addSubRegsPreOrder()
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| H A D | CodeGenRegisters.h | 184 return SubRegs; in getSubRegs()
277 SubRegMap SubRegs; member
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 37 let SubRegs = [SubReg];
44 let SubRegs = [SubReg];
61 let SubRegs = [SubReg];
76 let SubRegs = [SubReg];
84 let SubRegs = [SubReg];
97 let SubRegs = subregs;
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 448 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in findPotentialNewifiableTFRs() local
449 LastDef[*SubRegs] = &MI; in findPotentialNewifiableTFRs()
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| H A D | HexagonRegisterInfo.td | 41 let SubRegs = subregs;
62 let SubRegs = subregs;
78 let SubRegs = subregs;
131 let SubRegs = [USR_OVF];
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| H A D | HexagonFrameLowering.cpp | 252 for (MCSubRegIterator SubRegs(Reg, &TRI); SubRegs.isValid(); ++SubRegs) { in getMax32BitSubRegister() local
254 if (*SubRegs > RegNo) in getMax32BitSubRegister()
255 RegNo = *SubRegs; in getMax32BitSubRegister()
257 if (!RegNo || *SubRegs < RegNo) in getMax32BitSubRegister()
258 RegNo = *SubRegs; in getMax32BitSubRegister()
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| H A D | HexagonInstrInfo.cpp | 2064 for (MCSubRegIterator SubRegs(RegA, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent() local
2065 if (RegB == *SubRegs) in isDependent()
2069 for (MCSubRegIterator SubRegs(RegB, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent() local
2070 if (RegA == *SubRegs) in isDependent()
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| /freebsd-12.1/contrib/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 101 uint32_t SubRegs; // Sub-register set, described above member
488 init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs);
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| /freebsd-12.1/contrib/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.td | 18 let SubRegs = subregs;
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 37 let SubRegs = subregs;
46 let SubRegs = subregs;
53 let SubRegs = subregs;
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| /freebsd-12.1/contrib/llvm/include/llvm/Target/ |
| H A D | Target.td | 98 // in the SubRegs field of a Register definition. For example:
140 // SubRegs - A list of registers that are parts of this register. Note these
142 // themselves overlap. e.g. For X86, EAX's SubRegs list contains only [AX],
144 list<Register> SubRegs = [];
146 // SubRegIndices - For each register in SubRegs, specify the SubRegIndex used
148 // SubRegs.
185 // is used to populate the SubRegs and AliasSet fields of TargetRegisterDesc.
189 let SubRegs = subregs;
352 // SubRegs - N lists of registers to be zipped up. Super-registers are
353 // synthesized from the first element of each SubRegs list, the second
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 850 unsigned SubRegs = 0; in copyPhysReg() local
857 SubRegs = 2; in copyPhysReg()
861 SubRegs = 4; in copyPhysReg()
866 SubRegs = 2; in copyPhysReg()
870 SubRegs = 3; in copyPhysReg()
874 SubRegs = 4; in copyPhysReg()
878 SubRegs = 2; in copyPhysReg()
882 SubRegs = 2; in copyPhysReg()
887 SubRegs = 3; in copyPhysReg()
892 SubRegs = 4; in copyPhysReg()
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| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.td | 25 let SubRegs = subregs;
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.td | 31 let SubRegs = [subreg];
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 149 const unsigned SubRegs[]);
1032 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1, in createDTuple() local
1035 return createTuple(Regs, RegClassIDs, SubRegs); in createDTuple()
1041 static const unsigned SubRegs[] = {AArch64::qsub0, AArch64::qsub1, in createQTuple() local
1044 return createTuple(Regs, RegClassIDs, SubRegs); in createQTuple()
1049 const unsigned SubRegs[]) { in createTuple() argument
1068 Ops.push_back(CurDAG->getTargetConstant(SubRegs[i], DL, MVT::i32)); in createTuple()
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