| /freebsd-12.1/contrib/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 133 case MCDisassembler::SoftFail: in Check()
598 S = SoftFail; in AddThumbPredicate()
604 S = SoftFail; in AddThumbPredicate()
613 S = SoftFail; in AddThumbPredicate()
892 S = MCDisassembler::SoftFail; in DecodeGPRnopcRegisterClass()
979 S = MCDisassembler::SoftFail; in DecoderGPRRegisterClass()
1255 S = MCDisassembler::SoftFail; in DecodeSPRRegListOperand()
1280 S = MCDisassembler::SoftFail; in DecodeDPRRegListOperand()
1971 S = MCDisassembler::SoftFail; in DecodeHINTInstruction()
2017 S = MCDisassembler::SoftFail; in DecodeCPSInstruction()
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFormats.td | 168 field bits<16> SoftFail = 0;
176 field bits<16> SoftFail = 0;
187 field bits<32> SoftFail = 0;
201 field bits<48> SoftFail = 0;
216 field bits<32> SoftFail = 0;
230 field bits<32> SoftFail = 0;
244 field bits<32> SoftFail = 0;
258 field bits<48> SoftFail = 0;
276 field bits<48> SoftFail = 0;
295 field bits<48> SoftFail = 0;
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrFormatsV5.td | 44 // SoftFail is a field the disassembler can use to provide a way for
48 field bits<32> SoftFail = 0;
|
| H A D | HexagonInstrFormats.td | 62 // SoftFail is a field the disassembler can use to provide a way for
66 field bits<32> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/include/llvm/MC/MCDisassembler/ |
| H A D | MCDisassembler.h | 53 SoftFail = 1, enumerator
|
| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrFormatsC.td | 18 // SoftFail is a field the disassembler can use to provide a way for
22 field bits<16> SoftFail = 0;
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| H A D | RISCVInstrFormats.td | 84 // SoftFail is a field the disassembler can use to provide a way for
88 field bits<32> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 233 case MCDisassembler::SoftFail: in Check()
248 #define SoftFail MCDisassembler::SoftFail macro
1280 return SoftFail; in DecodeSignedLdStInstruction()
1363 return SoftFail; in DecodeExclusiveLdStInstruction()
1492 return SoftFail; in DecodePairLdStInstruction()
1497 return SoftFail; in DecodePairLdStInstruction()
1872 return SoftFail; in DecodeLoadAllocTagArrayInstruction()
|
| /freebsd-12.1/contrib/llvm/tools/llvm-mc/ |
| H A D | Disassembler.cpp | 65 case MCDisassembler::SoftFail: in PrintInsts()
|
| /freebsd-12.1/contrib/llvm/lib/Target/BPF/ |
| H A D | BPFInstrFormats.td | 94 field bits<64> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/MC/MCDisassembler/ |
| H A D | Disassembler.cpp | 266 case MCDisassembler::SoftFail: in LLVMDisasmInstruction()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrFormats.td | 66 field bits<16> SoftFail = 0;
79 field bits<32> SoftFail = 0;
|
| H A D | MipsInstrFormats.td | 116 field bits<32> SoftFail = 0;
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| H A D | MicroMipsInstrFormats.td | 49 field bits<16> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrFormats.td | 23 field bits<32> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructions.td | 27 // SoftFail is a field the disassembler can use to provide a way for
31 field bits<64> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrFormats.td | 27 field bits<32> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrFormats.td | 35 field bits<48> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 62 MCDisassembler::SoftFail; in addOperand()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 259 S = MCDisassembler::SoftFail; in DecodeIntPairRegisterClass()
|
| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRInstrFormats.td | 24 field bits<32> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrFormats.td | 13 field bits<32> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 16 field bits<64> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrFormats.td | 17 field bits<32> SoftFail = 0;
87 field bits<64> SoftFail = 0;
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMInstrFormats.td | 340 // the instruction is UNPREDICTABLE (SoftFail in abstract parlance).
342 // SoftFail is the generic name for this field, but we alias it so
344 field bits<32> SoftFail = Unpredictable;
|