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Searched refs:STM (Results 1 – 25 of 29) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUAsmPrinter.cpp212 if (!STM.hasCodeObjectV3() && STM.isAmdHsaOrMesa(F) && in EmitFunctionBodyStart()
220 if (STM.isAmdHsaOS()) in EmitFunctionBodyStart()
416 if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) { in runOnMachineFunction()
432 if (STM.isAmdPalOS()) in runOnMachineFunction()
434 else if (!STM.isAmdHsaOS()) { in runOnMachineFunction()
519 if (STM.dumpCode()) { in runOnMachineFunction()
839 !STM.hasSGPRInitBug()) { in getSIProgramInfo()
878 STM.hasSGPRInitBug()) { in getSIProgramInfo()
895 if (STM.hasSGPRInitBug()) { in getSIProgramInfo()
987 S_00B84C_TRAP_HANDLER(STM.isAmdHsaOS() ? 0 : STM.isTrapHandlerEnabled()) | in getSIProgramInfo()
[all …]
H A DR600AsmPrinter.cpp48 const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>(); in EmitProgramInfoR600() local
49 const R600RegisterInfo *RI = STM.getRegisterInfo(); in EmitProgramInfoR600()
72 if (STM.getGeneration() >= AMDGPUSubtarget::EVERGREEN) { in EmitProgramInfoR600()
H A DSILoadStoreOptimizer.cpp155 const GCNSubtarget *STM = nullptr; member in __anon16dce4e40111::SILoadStoreOptimizer
370 bool SILoadStoreOptimizer::widthsFit(const GCNSubtarget &STM, in widthsFit() argument
649 if (widthsFit(*STM, CI) && offsetsCanBeCombined(CI)) in findMatchingInst()
667 if (STM->ldsRequiresM0Init()) in read2Opcode()
673 if (STM->ldsRequiresM0Init()) in read2ST64Opcode()
764 if (STM->ldsRequiresM0Init()) in write2Opcode()
771 if (STM->ldsRequiresM0Init()) in write2ST64Opcode()
1467 CI.EltSize = AMDGPU::getSMRDEncodedOffset(*STM, 4); in optimizeBlock()
1514 STM = &MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction()
1515 if (!STM->loadStoreOptEnabled()) in runOnMachineFunction()
[all …]
H A DAMDGPUHSAMetadataStreamer.cpp214 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSACodeProps() local
223 HSACodeProps.mKernargSegmentSize = STM.getKernArgSegmentSize(F, in getHSACodeProps()
228 HSACodeProps.mWavefrontSize = STM.getWavefrontSize(); in getHSACodeProps()
233 HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled(); in getHSACodeProps()
243 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSADebugProps() local
246 if (!STM.debuggerSupported()) in getHSADebugProps()
252 if (STM.debuggerEmitPrologue()) { in getHSADebugProps()
921 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSAKernelProps() local
930 STM.getKernArgSegmentSize(F, MaxKernArgAlign)); in getHSAKernelProps()
938 std::make_shared<msgpack::ScalarNode>(STM.getWavefrontSize()); in getHSAKernelProps()
H A DSIMemoryLegalizer.cpp815 const GCNSubtarget &STM = MBB.getParent()->getSubtarget<GCNSubtarget>(); in insertCacheInvalidate() local
817 const unsigned Flush = STM.isAmdPalOS() || STM.isMesa3DOS() in insertCacheInvalidate()
/freebsd-12.1/contrib/file/magic/Magdir/
H A Dvaried.out43 # Generated by the "examples" in STM's ST40 devkit, and derived code.
/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DDAGISelMatcherEmitter.cpp970 } else if (const SwitchTypeMatcher *STM = dyn_cast<SwitchTypeMatcher>(M)) { in BuildHistogram() local
971 for (unsigned i = 0, e = STM->getNumCases(); i != e; ++i) in BuildHistogram()
972 BuildHistogram(STM->getCaseMatcher(i), OpcodeFreq); in BuildHistogram()
/freebsd-12.1/contrib/llvm/lib/IR/
H A DDataLayout.cpp592 StructLayoutMap *STM = static_cast<StructLayoutMap*>(LayoutMap); in getStructLayout() local
593 StructLayout *&SL = (*STM)[Ty]; in getStructLayout()
/freebsd-12.1/sys/gnu/dts/arm/
H A Duniphier-proxstream2.dtsi180 /* chip-internal connection for STM */
H A Duniphier-pxs2.dtsi378 /* chip-internal connection for STM */
H A Dqcom-msm8974.dtsi952 * 7 - connected to STM
H A Dqcom-apq8064.dtsi1649 * 2 - connected to STM component
/freebsd-12.1/contrib/gcc/config/arm/
H A Darm1020e.md181 ;; On a LDM/STM operation, the LSU pipeline iterates until all of the
192 ;; a register dependency; the dependency is cleared as soon as the LDM/STM
H A Darm1026ejs.md181 ;; On a LDM/STM operation, the LSU pipeline iterates until all of the
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td536 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
538 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
H A DARMScheduleR52.td507 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
509 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
H A DARMBaseInstrInfo.cpp1419 MachineInstrBuilder LDM, STM; in expandMEMCPY() local
1432 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA_UPD in expandMEMCPY()
1437 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA : ARM::STMIA)); in expandMEMCPY()
1444 STM.add(STBase).add(predOps(ARMCC::AL)); in expandMEMCPY()
1459 STM.addReg(Reg, RegState::Kill); in expandMEMCPY()
H A DARMScheduleA57.td713 def : InstRW<[A57WriteSTM], (instregex "(t2|sys|t)?STM(IA|DA|DB|IB)$")>;
715 (instregex "(t2|sys|t)?STM(IA_UPD|DA_UPD|DB_UPD|IB_UPD)", "tPUSH")>;
H A DARMInstrThumb.td810 // There is no non-writeback version of STM for Thumb.
1607 // post-inc STR -> STM r0!, {r1}. The layout of this (because it doesn't def
/freebsd-12.1/contrib/libunwind/src/
H A DUnwindRegistersSave.S792 @ . the pc (r15) cannot be in the list in an STM instruction
/freebsd-12.1/sys/gnu/dts/arm64/qcom/
H A Dmsm8916.dtsi1183 * 7 - connected to STM component
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZScheduleZEC12.td268 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;
H A DSystemZScheduleZ196.td257 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;
H A DSystemZScheduleZ13.td294 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
H A DSystemZScheduleZ14.td295 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;

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