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Searched refs:ST0 (Results 1 – 15 of 15) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/X86/InstPrinter/
H A DX86IntelInstPrinter.cpp169 if (Reg == X86::ST0) in printSTiRegOperand()
H A DX86ATTInstPrinter.cpp209 if (Reg == X86::ST0) in printSTiRegOperand()
/freebsd-12.1/contrib/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewRegisters.def117 CV_REGISTER(ST0, 128)
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp206 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
842 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0); in popStackAfter()
1635 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
H A DX86RegisterInfo.cpp548 Reserved.set(X86::ST0 + n); in getReservedRegs()
H A DX86RegisterInfo.td190 // MMX Registers. These are actually aliased to ST0 .. ST7
281 def ST0 : X86Reg<"st", 0>, DwarfRegNum<[33, 12, 11]>;
H A DX86InstrFPStack.td606 let Defs = [FPSW], Uses = [ST0, FPCW] in {
615 let Defs = [EFLAGS, FPSW], Uses = [ST0, FPCW] in {
H A DX86InstrControl.td20 // The X86retflag return instructions are variadic because we may add ST0 and
H A DX86InstrCompiler.td481 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,
501 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,
H A DX86InstrInfo.td3237 (Inst ST0), EmitAlias>;
/freebsd-12.1/sys/dev/ctau/
H A Dctddk.h362 port_t MD0, MD1, MD2, CTL, RXS, TXS, TMC, CMD, ST0, member
H A Dctau.c492 set(ST0, 0); set(ST1, 0); set(ST2, 0); set(ST3, 0); in ct_init_chan()
511 set(ST0, 1); set(ST1, 1); set(ST2, 1); set(ST3, 1); in ct_init_chan()
/freebsd-12.1/contrib/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp922 mcInst.addOperand(MCOperand::createReg(X86::ST0 + stackPos)); in translateFPRegister()
/freebsd-12.1/contrib/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp111 {codeview::RegisterId::ST0, X86::FP0}, in initLLVMToSEHAndCVRegMapping()
/freebsd-12.1/contrib/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp1118 if (RegNo == X86::ST0) { in ParseRegister()
1131 case 0: RegNo = X86::ST0; break; in ParseRegister()