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/freebsd-12.1/crypto/openssl/crypto/bn/asm/
H A Dppc.pl115 $ST= "stw"; # store
139 $ST= "std"; # store
1808 $ST r9,`0*$BNSZ`(r3)
1822 $ST r9,`2*$BNSZ`(r3)
1845 $ST r9,`0*$BNSZ`(r3)
1859 $ST r9,`1*$BNSZ`(r3)
1872 $ST r9,`2*$BNSZ`(r3)
1922 $ST r9,`0*$BNSZ`(r3)
1975 $ST r9,0(r3)
1987 $ST r9,0(r3)
[all …]
H A Dppc-mont.pl55 $ST= "stw"; # store
64 $PUSH= $ST;
76 $ST= "std"; # store
85 $PUSH= $ST;
228 $ST $hi1,$BNSZ($tp)
294 $ST $hi1,$BNSZ($tp)
763 $ST $a1,$SIZE_T*2($tp)
764 $ST $a2,$SIZE_T*3($tp)
765 $ST $a3,$SIZE_T*4($tp)
811 $ST $t0,$SIZE_T*1($bp)
[all …]
H A Dmips.pl64 $ST="sd";
79 $ST="sw";
186 $ST $t1,0($a0)
246 $ST $t1,0($a0)
338 $ST $v0,0($a0)
382 $ST $v0,0($a0)
463 $ST $t1,0($a0)
502 $ST $t1,0($a0)
629 $ST $t0,0($a0)
761 $ST $t0,0($a0)
[all …]
H A Dmips-mont.pl82 $ST="sd";
89 $ST="sw";
235 $ST $lo1,($tp)
255 $ST $lo1,($tp)
259 $ST $hi1,$BNSZ($tp)
330 $ST $lo1,($tp)
349 $ST $lo1,($tp)
356 $ST $lo1,$BNSZ($tp)
378 $ST $lo0,($rp)
391 $ST $zero,($tp)
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp73 if (ST.flatScratchIsPointer()) { in emitFlatScratchInit()
101 const GCNSubtarget &ST, in getReservedPrivateSegmentBufferReg() argument
114 if (ST.hasSGPRInitBug() || in getReservedPrivateSegmentBufferReg()
152 const GCNSubtarget &ST, in getReservedPrivateSegmentWaveByteOffsetReg() argument
168 if (ST.hasSGPRInitBug()) in getReservedPrivateSegmentWaveByteOffsetReg()
224 if (ST.debuggerEmitPrologue()) in emitEntryFunctionPrologue()
292 if (ST.isAmdHsaOrMesa(F)) { in emitEntryFunctionPrologue()
311 assert(ST.isAmdHsaOrMesa(F) || ST.isMesaGfxShader(F)); in emitEntryFunctionPrologue()
336 ST.isAmdHsaOrMesa(F) && in emitEntryFunctionPrologue()
377 if (ST.isAmdPalOS()) { in emitEntryFunctionScratchSetup()
[all …]
H A DGCNIterativeScheduler.cpp111 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printRegions() local
117 R->MaxPressure.print(OS, &ST); in printRegions()
135 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printSchedRP() local
137 Before.print(OS, &ST); in printSchedRP()
139 After.print(OS, &ST); in printSchedRP()
426 SchedMaxRP.print(dbgs(), &ST), in scheduleRegion()
428 MaxRP.print(dbgs(), &ST), in scheduleRegion()
430 RegionMaxRP.print(dbgs(), &ST), in scheduleRegion()
460 if (R->MaxPressure.getOccupancy(ST) >= NewOcc) in tryMaximizeOccupancy()
522 if (RP.getOccupancy(ST) < TgtOcc) { in scheduleLegacyMaxOccupancy()
[all …]
H A DGCNHazardRecognizer.cpp43 ST(MF.getSubtarget<GCNSubtarget>()), in GCNHazardRecognizer()
44 TII(*ST.getInstrInfo()), in GCNHazardRecognizer()
157 if (ST.hasReadM0MovRelInterpHazard() && in getHazardType()
334 if (!ST.isXNACKEnabled()) in checkSoftClauseHazards()
446 const SIInstrInfo *TII = ST.getInstrInfo(); in checkDPPHazards()
470 const SIInstrInfo *TII = ST.getInstrInfo(); in checkDivFMasHazards()
482 const SIInstrInfo *TII = ST.getInstrInfo(); in checkGetRegHazards()
495 const SIInstrInfo *TII = ST.getInstrInfo(); in checkSetRegHazards()
583 if (!ST.has12DWordStoreHazard()) in checkVALUHazards()
605 if (!ST.has12DWordStoreHazard()) in checkInlineAsmHazards()
[all …]
H A DSIMachineFunctionInfo.cpp50 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in SIMachineFunctionInfo() local
52 FlatWorkGroupSizes = ST.getFlatWorkGroupSizes(F); in SIMachineFunctionInfo()
53 WavesPerEU = ST.getWavesPerEU(F); in SIMachineFunctionInfo()
91 if (ST.debuggerEmitPrologue()) { in SIMachineFunctionInfo()
131 if (ST.getGeneration() >= AMDGPUSubtarget::GFX9 && in SIMachineFunctionInfo()
137 bool isAmdHsaOrMesa = ST.isAmdHsaOrMesa(F); in SIMachineFunctionInfo()
149 } else if (ST.isMesaGfxShader(F)) { in SIMachineFunctionInfo()
176 const GCNSubtarget& ST = MF.getSubtarget<GCNSubtarget>(); in limitOccupancy() local
251 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateSGPRSpillToVGPR() local
252 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateSGPRSpillToVGPR()
[all …]
H A DAMDGPUTargetTransformInfo.h65 const GCNSubtarget *ST; variable
94 const GCNSubtarget *getST() const { return ST; } in getST()
114 return ST->hasHalfRate64Ops() ? in get64BitInstrCost()
121 ST(static_cast<const GCNSubtarget*>(TM->getSubtargetImpl(F))), in GCNTTIImpl()
122 TLI(ST->getTargetLowering()), in GCNTTIImpl()
181 return ST->hasFlatAddressSpace() ? in getFlatAddressSpace()
209 const R600Subtarget *ST; variable
216 ST(static_cast<const R600Subtarget*>(TM->getSubtargetImpl(F))), in R600TTIImpl()
217 TLI(ST->getTargetLowering()), in R600TTIImpl()
220 const R600Subtarget *getST() const { return ST; } in getST()
H A DGCNRegPressure.h52 unsigned getOccupancy(const GCNSubtarget &ST) const { in getOccupancy()
53 return std::min(ST.getOccupancyWithNumSGPRs(getSGPRNum()), in getOccupancy()
54 ST.getOccupancyWithNumVGPRs(getVGPRNum())); in getOccupancy()
62 bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure& O) const { in higherOccupancy()
63 return getOccupancy(ST) > O.getOccupancy(ST); in higherOccupancy()
66 bool less(const GCNSubtarget &ST, const GCNRegPressure& O,
77 void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
H A DR600ControlFlowFinalizer.cpp61 const R600Subtarget *ST; member
101 if (!ST->hasCFAluBug()) in requiresWorkAroundForInst()
112 if (ST->getWavefrontSize() == 64) { in requiresWorkAroundForInst()
123 assert(ST->getWavefrontSize() == 32); in requiresWorkAroundForInst()
139 assert(!ST->hasCaymanISA()); in getSubEntrySize()
174 if (!ST->hasCaymanISA() && in pushBranch()
181 !ST->hasCaymanISA() && in pushBranch()
239 const R600Subtarget *ST = nullptr; member in __anonf80183fd0111::R600ControlFlowFinalizer
286 if (ST->hasCaymanISA()) { in getHWInstrDesc()
511 TII = ST->getInstrInfo(); in runOnMachineFunction()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCTargetTransformInfo.h34 const ARCSubtarget *ST; variable
37 const ARCSubtarget *getST() const { return ST; } in getST()
42 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()), in ARCTTIImpl()
43 TLI(ST->getTargetLowering()) {} in ARCTTIImpl()
47 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {} in ARCTTIImpl()
49 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)), in ARCTTIImpl()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp181 if (ST->isPPC64() && in getIntImmCost()
210 if (ST->getDarwinDirective() == PPC::DIR_A2) { in getUnrollingPreferences()
236 if (ST->getDarwinDirective() == PPC::DIR_A2) in enableAggressiveInterleaving()
260 if (Vector && !ST->hasAltivec() && !ST->hasQPX()) in getNumberOfRegisters()
262 return ST->hasVSX() ? 64 : 32; in getNumberOfRegisters()
267 if (ST->hasQPX()) return 256; in getRegisterBitWidth()
268 if (ST->hasAltivec()) return 128; in getRegisterBitWidth()
272 if (ST->isPPC64()) in getRegisterBitWidth()
411 bool IsAltivecType = ST->hasAltivec() && in getMemoryOpCost()
414 bool IsVSXType = ST->hasVSX() && in getMemoryOpCost()
[all …]
/freebsd-12.1/contrib/llvm/lib/TableGen/
H A DSetTheory.cpp41 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
49 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
55 ST.evaluate(*Expr->arg_begin(), Add, Loc); in apply()
65 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
71 ST.evaluate(Expr->arg_begin()[0], S1, Loc); in apply()
72 ST.evaluate(Expr->arg_begin()[1], S2, Loc); in apply()
84 void apply(SetTheory &ST, DagInit *Expr, RecSet &Elts, in apply()
90 ST.evaluate(Expr->arg_begin()[0], Set, Loc); in apply()
95 apply2(ST, Expr, Set, II->getValue(), Elts, Loc); in apply()
166 ST.evaluate(Expr->getArg(i), Args[i], Loc); in apply()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.h48 const ARMSubtarget *ST; variable
84 const ARMSubtarget *getST() const { return ST; } in getST()
89 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in ARMTTIImpl()
90 TLI(ST->getTargetLowering()) {} in ARMTTIImpl()
101 return !ST->isTargetDarwin(); in isFPVectorizationPotentiallyUnsafe()
122 if (ST->hasNEON()) in getNumberOfRegisters()
127 if (ST->isThumb1Only()) in getNumberOfRegisters()
134 if (ST->hasNEON()) in getRegisterBitWidth()
143 return ST->getMaxInterleaveFactor(); in getMaxInterleaveFactor()
183 if (ST->isROPI() || ST->isRWPI()) in shouldBuildLookupTablesForConstant()
H A DARMLegalizerInfo.cpp64 return ST.isTargetAEABI() || ST.isTargetGNUAEABI() || ST.isTargetMuslAEABI(); in AEABI()
78 if (ST.isThumb1Only()) { in ARMLegalizerInfo()
81 verify(*ST.getInstrInfo()); in ARMLegalizerInfo()
110 if (ST.isThumb()) { in ARMLegalizerInfo()
120 if (ST.hasDivideInARMMode()) in ARMLegalizerInfo()
133 else if (AEABI(ST)) in ARMLegalizerInfo()
141 if (ST.hasV5TOps()) { in ARMLegalizerInfo()
173 if (!ST.useSoftFloat() && ST.hasVFP2()) { in ARMLegalizerInfo()
208 if (AEABI(ST)) in ARMLegalizerInfo()
222 if (!ST.useSoftFloat() && ST.hasVFP4()) in ARMLegalizerInfo()
[all …]
/freebsd-12.1/crypto/openssl/crypto/rc4/asm/
H A Drc4-parisc.pl71 $ST="stb";
76 $ST="stw";
107 $ST $TX[0],0($ix)
111 $ST $TY,0($iy)
127 $ST $TX[0],0($iy)
129 $ST $TY,0($ix)
259 $ST %r0,`0*$SZ`($key)
260 $ST %r0,`1*$SZ`($key)
264 $ST @XX[0],0($key)
288 $ST @TX[0],0($YY)
[all …]
/freebsd-12.1/crypto/openssl/crypto/sha/asm/
H A Dsha512-s390x.pl81 $ST="stg"; # store to memory
95 $ST="st"; # store to memory
124 $ST $T1,`$stdframe+$SZ*($i%16)`($sp)
302 $ST $A,`0*$SZ`($ctx)
303 $ST $B,`1*$SZ`($ctx)
304 $ST $C,`2*$SZ`($ctx)
305 $ST $D,`3*$SZ`($ctx)
306 $ST $E,`4*$SZ`($ctx)
307 $ST $F,`5*$SZ`($ctx)
308 $ST $G,`6*$SZ`($ctx)
[all …]
H A Dsha512-sparcv9.pl716 $ST $A,[$ctx+`0*$SZ`]
718 $ST $B,[$ctx+`1*$SZ`]
720 $ST $C,[$ctx+`2*$SZ`]
722 $ST $D,[$ctx+`3*$SZ`]
724 $ST $E,[$ctx+`4*$SZ`]
726 $ST $F,[$ctx+`5*$SZ`]
728 $ST $G,[$ctx+`6*$SZ`]
730 $ST $H,[$ctx+`7*$SZ`]
748 $ST $A,[$ctx+`0*$SZ`]
750 $ST $B,[$ctx+`1*$SZ`]
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp144 if (ST->is64Bit()) in getRegisterBitWidth()
161 if (ST->isAtom()) in getMaxInterleaveFactor()
166 if (ST->hasAVX()) in getMaxInterleaveFactor()
191 if (ST->isGLM()) in getArithmeticInstrCost()
220 if (ST->isSLM()) { in getArithmeticInstrCost()
342 ST->hasSSE2() && !ST->hasXOP()) { in getArithmeticInstrCost()
492 if (ST->hasDQI()) in getArithmeticInstrCost()
519 if (ST->hasBWI()) in getArithmeticInstrCost()
1580 if (ST->hasSSE2() && !ST->hasAVX()) { in getCastInstrCost()
2845 if (ST->hasAVX512() && (VF == 2 || (VF == 4 && !ST->hasVLX()))) in getGatherScatterOpCost()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h48 const AArch64Subtarget *ST; variable
51 const AArch64Subtarget *getST() const { return ST; } in getST()
65 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in AArch64TTIImpl()
66 TLI(ST->getTargetLowering()) {} in AArch64TTIImpl()
91 if (ST->hasNEON()) in getNumberOfRegisters()
100 if (ST->hasNEON()) in getRegisterBitWidth()
108 return ST->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
H A DAArch64MacroFusion.cpp380 const AArch64Subtarget &ST = static_cast<const AArch64Subtarget&>(TSI); in shouldScheduleAdjacent() local
384 if (ST.hasArithmeticBccFusion() && isArithmeticBccPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
386 if (ST.hasArithmeticCbzFusion() && isArithmeticCbzPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
388 if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
390 if (ST.hasFuseCryptoEOR() && isCryptoEORPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
392 if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
394 if (ST.hasFuseAddress() && isAddressLdStPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
396 if (ST.hasFuseCCSelect() && isCCSelectPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
398 if (ST.hasFuseArithmeticLogic() && isArithmeticLogicPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
/freebsd-12.1/contrib/llvm/lib/IR/
H A DValue.cpp165 ST = nullptr; in getSymTab()
249 ValueSymbolTable *ST; in setNameImpl() local
250 if (getSymTab(this, ST)) in setNameImpl()
292 ValueSymbolTable *ST = nullptr; in takeName() local
296 if (getSymTab(this, ST)) { in takeName()
304 if (ST) in takeName()
315 if (!ST) { in takeName()
316 if (getSymTab(this, ST)) { in takeName()
330 if (ST == VST) { in takeName()
347 if (ST) in takeName()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreTargetTransformInfo.h33 const XCoreSubtarget *ST; variable
36 const XCoreSubtarget *getST() const { return ST; } in getST()
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()), in XCoreTTIImpl()
42 TLI(ST->getTargetLowering()) {} in XCoreTTIImpl()
/freebsd-12.1/stand/efi/libefi/
H A Dlibefi.c36 EFI_SYSTEM_TABLE *ST; variable
46 for (i = 0; i < ST->NumberOfTableEntries; i++) { in efi_get_table()
47 id = &ST->ConfigurationTable[i].VendorGuid; in efi_get_table()
49 return (ST->ConfigurationTable[i].VendorTable); in efi_get_table()

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