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Searched refs:SLL (Results 1 – 25 of 31) sorted by relevance

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/freebsd-12.1/crypto/openssl/crypto/sha/asm/
H A Dsha512-mips.pl96 $SLL="dsll"; # shift left logical
111 $SLL="sll"; # shift left logical
212 $SLL $tmp1,$e,`$SZ*8-@Sigma1[2]`
216 $SLL $tmp1,$e,`$SZ*8-@Sigma1[1]`
220 $SLL $tmp1,$e,`$SZ*8-@Sigma1[0]`
228 $SLL $tmp1,$a,`$SZ*8-@Sigma0[2]`
232 $SLL $tmp1,$a,`$SZ*8-@Sigma0[1]`
236 $SLL $tmp1,$a,`$SZ*8-@Sigma0[0]`
276 $SLL $tmp1,@X[1],`$SZ*8-@sigma0[2]`
279 $SLL $tmp1,`@sigma0[2]-@sigma0[1]`
[all …]
H A Dsha512-sparcv9.pl67 $SLL="sllx"; # shift left logical
93 $SLL="sll"; # shift left logical
234 $SLL $e,`$SZ*8-@Sigma1[2]`,$tmp1
238 $SLL $e,`$SZ*8-@Sigma1[1]`,$tmp1
242 $SLL $e,`$SZ*8-@Sigma1[0]`,$tmp1
250 $SLL $a,`$SZ*8-@Sigma0[2]`,$tmp1
254 $SLL $a,`$SZ*8-@Sigma0[1]`,$tmp1
258 $SLL $a,`$SZ*8-@Sigma0[0]`,$tmp1
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp49 AddInstr(SeqLs, Inst(SLL, Shamt)); in GetInstSeqLsSLL()
94 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16)) in ReplaceADDiuSLLWithLUi()
137 SLL = Mips::SLL; in Analyze()
142 SLL = Mips::DSLL; in Analyze()
H A DMipsAnalyzeImmediate.h61 unsigned ADDiu, ORi, SLL, LUi; variable
H A DMipsFastISel.cpp1613 emitInst(Mips::SLL, TempReg[0]).addReg(SrcReg).addImm(8); in fastLowerIntrinsicCall()
1641 emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8); in fastLowerIntrinsicCall()
1643 emitInst(Mips::SLL, TempReg[6]).addReg(SrcReg).addImm(24); in fastLowerIntrinsicCall()
1841 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1994 Opcode = Mips::SLL; in selectShift()
H A DMipsExpandPseudo.cpp184 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicCmpSwapSubword()
464 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicBinOpSubword()
H A DMipsScheduleP5600.td212 SEB, SEH, SLT, SLTu, SLL, SRA, SRL, XORi,
422 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
H A DMipsISelLowering.cpp1551 BuildMI(BB, DL, TII->get(Mips::SLL), ScrReg).addReg(SrcReg).addImm(ShiftImm); in emitSignExtendToI32InReg()
1666 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicBinaryPartword()
1671 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicBinaryPartword()
1849 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicCmpSwapPartword()
1854 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicCmpSwapPartword()
2530 SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); in lowerLOAD() local
2531 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); in lowerLOAD()
H A DMipsAsmPrinter.cpp1212 EmitToStreamer(*OutStreamer, MCInstBuilder(Mips::SLL) in EmitSled()
H A DMipsInstrFormats.td912 let Inst{5-0} = 0; // SLL
H A DMips64InstrInfo.td747 (SLL (EXTRACT_SUBREG GPR64:$src, sub_32), 0)>, ISA_MIPS3, GPR_64;
857 (SLL GPR32:$src, immZExt5:$imm5), sub_32)>;
H A DMipsInstrInfo.td2088 def SLL : MMRel, shift_rotate_imm<"sll", uimm5, GPR32Opnd, II_SLL, shl,
2378 PseudoInstExpansion<(SLL ZERO, ZERO, 0)>, ISA_MIPS1;
2703 def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>, ISA_MIPS1;
H A DMipsScheduleGeneric.td1026 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
H A DMips16InstrInfo.td1151 // Format: SLL rx, ry, sa MIPS16e
/freebsd-12.1/crypto/openssl/crypto/bn/asm/
H A Dmips.pl70 $SLL="dsll";
85 $SLL="sll";
919 $SLL $a2,1
926 $SLL $t2,$t1
934 $SLL $a0,$t9
935 $SLL $a1,$t9
980 $SLL $a1,4*$BNSZ # bits
1978 $SLL $t_2,1
1982 $SLL $t_1,1
2188 $SLL $t_2,1
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp247 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in emitEmptyDelaySlot()
255 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in emitNop()
H A DMipsMCCodeEmitter.cpp190 if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && in encodeInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVExpandPseudoInsts.cpp322 BuildMI(MBB, DL, TII->get(RISCV::SLL), ValReg) in insertSext()
H A DRISCVInstrInfo.td361 def SLL : ALU_rr<0b0000000, 0b001, "sll">;
713 def : PatGprGpr<shiftop<shl>, SLL>;
/freebsd-12.1/usr.bin/units/
H A Ddefinitions.units494 SLL sierraleoneleone
/freebsd-12.1/contrib/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp3533 TOut.emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in expandBranchImm()
3551 TOut.emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI); in expandBranchImm()
4181 TOut.emitRRI(Mips::SLL, SllReg, SllReg, 8, IDLoc, STI); in expandUlh()
4227 TOut.emitRRI(Mips::SLL, DstReg, DstReg, 8, IDLoc, STI); in expandUsh()
4502 FirstShift = Mips::SLL; in expandRotationImm()
4507 SecondShift = Mips::SLL; in expandRotationImm()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td241 defm SLL : ALU<BPF_LSH, "<<=", shl>;
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.td1354 defm SLL : BinaryRSAndK<"sll", 0x89, 0xEBDF, shiftop<shl>, GR32>;
2165 (SLL GR32:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
H A DSystemZScheduleZEC12.td473 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLL(G|K)?$")>;
H A DSystemZScheduleZ196.td462 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLL(G|K)?$")>;

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