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Searched refs:SIInstrInfo (Results 1 – 25 of 43) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp131 if ((SIInstrInfo::isVMEM(*MI) || in getHazardType()
132 SIInstrInfo::isFLAT(*MI)) in getHazardType()
182 if (SIInstrInfo::isSMRD(*MI)) in PreEmitNoops()
185 if (SIInstrInfo::isVALU(*MI)) in PreEmitNoops()
188 if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isFLAT(*MI)) in PreEmitNoops()
191 if (SIInstrInfo::isDPP(*MI)) in PreEmitNoops()
357 if (IsSMRD != SIInstrInfo::isSMRD(*MI)) in checkSoftClauseHazards()
446 const SIInstrInfo *TII = ST.getInstrInfo(); in checkDPPHazards()
470 const SIInstrInfo *TII = ST.getInstrInfo(); in checkDivFMasHazards()
482 const SIInstrInfo *TII = ST.getInstrInfo(); in checkGetRegHazards()
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H A DSIModeRegister.cpp145 void processBlockPhase1(MachineBasicBlock &MBB, const SIInstrInfo *TII);
147 void processBlockPhase2(MachineBasicBlock &MBB, const SIInstrInfo *TII);
149 void processBlockPhase3(MachineBasicBlock &MBB, const SIInstrInfo *TII);
151 Status getInstructionMode(MachineInstr &MI, const SIInstrInfo *TII);
154 const SIInstrInfo *TII, Status InstrMode);
172 const SIInstrInfo *TII) { in getInstructionMode()
194 const SIInstrInfo *TII, Status InstrMode) { in insertSetreg()
229 const SIInstrInfo *TII) { in processBlockPhase1()
328 const SIInstrInfo *TII) { in processBlockPhase2()
364 const SIInstrInfo *TII) { in processBlockPhase3()
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H A DSIInstrInfo.cpp88 SIInstrInfo::SIInstrInfo(const GCNSubtarget &ST) in SIInstrInfo() function in SIInstrInfo
735 case SIInstrInfo::VCCNZ: { in insertVectorSelect()
747 case SIInstrInfo::VCCZ: { in insertVectorSelect()
773 case SIInstrInfo::EXECZ: { in insertVectorSelect()
1563 unsigned SIInstrInfo::getBranchOpcode(SIInstrInfo::BranchPredicate Cond) { in getBranchOpcode()
1565 case SIInstrInfo::SCC_TRUE: in getBranchOpcode()
1569 case SIInstrInfo::VCCNZ: in getBranchOpcode()
1571 case SIInstrInfo::VCCZ: in getBranchOpcode()
1573 case SIInstrInfo::EXECNZ: in getBranchOpcode()
1575 case SIInstrInfo::EXECZ: in getBranchOpcode()
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H A DSIFrameLowering.h17 class SIInstrInfo; variable
57 const SIInstrInfo *TII,
64 const SIInstrInfo *TII,
H A DSIShrinkInstructions.cpp70 static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII, in foldImmediates()
123 static bool isKImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKImmOperand()
129 static bool isKUImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKUImmOperand()
135 static bool isKImmOrKUImmOperand(const SIInstrInfo *TII, in isKImmOrKUImmOperand()
153 static bool isReverseInlineImm(const SIInstrInfo *TII, in isReverseInlineImm()
177 static void shrinkScalarCompare(const SIInstrInfo *TII, MachineInstr &MI) { in shrinkScalarCompare()
222 const SIInstrInfo *TII, in shrinkScalarLogicOp()
361 const SIInstrInfo *TII) { in matchSwap()
460 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DAMDGPUMacroFusion.cpp33 const SIInstrInfo &TII = static_cast<const SIInstrInfo&>(TII_); in shouldScheduleAdjacent()
H A DAMDGPUMCInstLower.cpp84 case SIInstrInfo::MO_GOTPCREL: in getVariantKind()
86 case SIInstrInfo::MO_GOTPCREL32_LO: in getVariantKind()
88 case SIInstrInfo::MO_GOTPCREL32_HI: in getVariantKind()
90 case SIInstrInfo::MO_REL32_LO: in getVariantKind()
92 case SIInstrInfo::MO_REL32_HI: in getVariantKind()
167 const auto *TII = static_cast<const SIInstrInfo*>(ST.getInstrInfo()); in lower()
H A DSIPeepholeSDWA.cpp75 const SIInstrInfo *TII;
121 virtual MachineInstr *potentialToConvert(const SIInstrInfo *TII) = 0;
122 virtual bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) = 0;
154 MachineInstr *potentialToConvert(const SIInstrInfo *TII) override;
155 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
162 uint64_t getSrcMods(const SIInstrInfo *TII,
181 MachineInstr *potentialToConvert(const SIInstrInfo *TII) override;
182 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
202 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
335 uint64_t SDWASrcOperand::getSrcMods(const SIInstrInfo *TII, in getSrcMods()
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H A DSIFrameLowering.cpp41 const SIInstrInfo *TII = ST.getInstrInfo(); in emitFlatScratchInit()
102 const SIInstrInfo *TII, in getReservedPrivateSegmentBufferReg()
153 const SIInstrInfo *TII, in getReservedPrivateSegmentWaveByteOffsetReg()
237 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEntryFunctionPrologue()
372 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEntryFunctionScratchSetup()
541 const SIInstrInfo *TII = ST.getInstrInfo(); in emitPrologue()
611 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEpilogue()
672 const SIInstrInfo *TII = ST.getInstrInfo(); in processFunctionBeforeFrameFinalized()
754 const SIInstrInfo *TII = ST.getInstrInfo(); in eliminateCallFramePseudoInstr()
783 const SIInstrInfo *TII = ST.getInstrInfo(); in emitDebuggerPrologue()
H A DSIOptimizeExecMasking.cpp141 static bool removeTerminatorBit(const SIInstrInfo &TII, MachineInstr &MI) { in removeTerminatorBit()
165 const SIInstrInfo &TII, in fixTerminators()
180 const SIInstrInfo &TII, in findExecCopy()
214 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DGCNHazardRecognizer.h29 class SIInstrInfo; variable
41 const SIInstrInfo &TII;
H A DAMDGPUInstructionSelector.h39 class SIInstrInfo; variable
93 const SIInstrInfo &TII;
H A DSIOptimizeExecMaskingPreRA.cpp84 const SIInstrInfo &TII) { in getOrNonExecReg()
95 const SIInstrInfo &TII, in getOrExecSource()
127 const SIInstrInfo *TII = ST.getInstrInfo(); in optimizeVcndVcmpPair()
228 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DSIFormMemoryClauses.cpp101 return SIInstrInfo::isFLAT(MI) || SIInstrInfo::isVMEM(MI); in isVMEMClauseInst()
105 return SIInstrInfo::isSMRD(MI); in isSMEMClauseInst()
302 const SIInstrInfo *TII = ST->getInstrInfo(); in runOnMachineFunction()
H A DSIFixSGPRCopies.cpp199 const SIInstrInfo *TII) { in tryChangeVGPRtoSGPRinCopy()
237 const SIInstrInfo *TII, in foldVGPRCopyIntoRegSequence()
309 const SIInstrInfo *TII) { in phiHasVGPROperands()
354 const SIInstrInfo *TII, in isSafeToFoldImmIntoCopy()
574 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DSISchedule.td15 const SIInstrInfo *TII =
16 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
H A DSIFixupVectorISel.cpp161 const SIInstrInfo *TII, in fixupGlobalSaddr()
222 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DSIFoldOperands.cpp88 const SIInstrInfo *TII;
132 static bool isInlineConstantIfFolded(const SIInstrInfo *TII, in isInlineConstantIfFolded()
168 const SIInstrInfo &TII, in updateOperand()
284 const SIInstrInfo *TII) { in tryAddToFoldList()
389 static bool isUseSafeToFold(const SIInstrInfo *TII, in isUseSafeToFold()
653 const SIInstrInfo *TII, in tryConstantFoldOp()
766 static bool tryFoldInst(const SIInstrInfo *TII, in tryFoldInst()
H A DSIRegisterInfo.cpp275 assert(SIInstrInfo::isMUBUF(*MI)); in getMUBUFInstrOffset()
284 if (!SIInstrInfo::isMUBUF(*MI)) in getFrameIndexInstrOffset()
315 const SIInstrInfo *TII = Subtarget.getInstrInfo(); in materializeFrameBaseRegister()
344 const SIInstrInfo *TII = Subtarget.getInstrInfo(); in resolveFrameIndex()
378 if (!SIInstrInfo::isMUBUF(*MI)) in isFrameOffsetLegal()
485 static bool buildMUBUFOffsetLoadStore(const SIInstrInfo *TII, in buildMUBUFOffsetLoadStore()
532 const SIInstrInfo *TII = ST.getInstrInfo(); in buildSpillLoadStore()
660 const SIInstrInfo *TII = ST.getInstrInfo(); in spillSGPR()
838 const SIInstrInfo *TII = ST.getInstrInfo(); in restoreSGPR()
998 const SIInstrInfo *TII = ST.getInstrInfo(); in eliminateFrameIndex()
H A DSIFixVGPRCopies.cpp52 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DSIInsertWaitcnts.cpp253 RegInterval getRegInterval(const MachineInstr *MI, const SIInstrInfo *TII,
268 void updateByEvent(const SIInstrInfo *TII, const SIRegisterInfo *TRI,
336 void setExpScore(const MachineInstr *MI, const SIInstrInfo *TII,
359 const SIInstrInfo *TII = nullptr;
450 const SIInstrInfo *TII, in getRegInterval()
492 const SIInstrInfo *TII, in setExpScore()
506 void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII, in updateByEvent()
1121 } else if (SIInstrInfo::isVMEM(Inst) && in updateEventWaitcntAfter()
H A DSIDebuggerInsertNops.cpp75 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DSILowerControlFlow.cpp82 const SIInstrInfo *TII = nullptr;
137 const SIInstrInfo *TII) { in isSimpleIf()
343 && SIInstrInfo::isVALU(*Def); in emitIfBreak()
H A DSIMachineFunctionInfo.h615 const AMDGPUBufferPseudoSourceValue *getBufferPSV(const SIInstrInfo &TII, in getBufferPSV()
624 const AMDGPUImagePseudoSourceValue *getImagePSV(const SIInstrInfo &TII, in getImagePSV()
H A DSIAddIMGInit.cpp66 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()

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