Home
last modified time | relevance | path

Searched refs:RegsToPass (Results 1 – 24 of 24) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp258 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCall() local
287 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
315 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
316 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
317 RegsToPass[i].second, Glue); in LowerCall()
340 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
341 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
342 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMips16ISelLowering.h48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
H A DMips16ISelLowering.cpp417 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, in getOpndList()
497 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); in getOpndList()
505 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); in getOpndList()
510 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
H A DMipsSEISelLowering.h69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsISelLowering.cpp2853 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in getOpndList()
2855 RegsToPass[i].second, InFlag); in getOpndList()
2861 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in getOpndList()
2862 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first, in getOpndList()
3040 std::deque<std::pair<unsigned, SDValue>> RegsToPass; in LowerCall() local
3090 RegsToPass.push_back(std::make_pair(LocRegLo, Lo)); in LowerCall()
3091 RegsToPass.push_back(std::make_pair(LocRegHigh, Hi)); in LowerCall()
3130 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
4148 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in passByValArg() argument
4174 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
[all …]
H A DMipsISelLowering.h499 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
585 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsSEISelLowering.cpp1155 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in getOpndList() argument
1160 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp778 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32() local
904 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
908 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
933 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32()
934 unsigned Reg = toCallerWindow(RegsToPass[i].first); in LowerCall_32()
957 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall_32()
1130 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_64() local
1236 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_64()
1238 RegsToPass[i].first, RegsToPass[i].second, InGlue); in LowerCall_64()
1257 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall_64()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp652 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
714 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCCCCallTo()
715 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCCCCallTo()
716 RegsToPass[I].second, InFlag); in LowerCCCCallTo()
747 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCCCCallTo()
748 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCCCCallTo()
749 RegsToPass[I].second.getValueType())); in LowerCCCCallTo()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp321 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; in LowerCall() local
349 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
359 for (auto &Reg : RegsToPass) { in LowerCall()
385 for (auto &Reg : RegsToPass) in LowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp804 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
832 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
872 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
873 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
874 RegsToPass[i].second, InFlag); in LowerCCCCallTo()
894 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
895 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
896 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1131 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
1157 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
1180 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
1181 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
1182 RegsToPass[i].second, InFlag); in LowerCCCCallTo()
1205 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
1206 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
1207 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp5094 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in PrepareCall()
5095 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in PrepareCall()
5441 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32SVR4() local
5528 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32SVR4()
5529 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall_32SVR4()
5530 RegsToPass[i].second, InFlag); in LowerCall_32SVR4()
5779 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_64SVR4() local
5942 RegsToPass.push_back(std::make_pair(PPC::X11, Arg)); in LowerCall_64SVR4()
6221 RegsToPass[i].second, InFlag); in LowerCall_64SVR4()
6362 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_Darwin() local
[all …]
H A DPPCISelLowering.h1034 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp371 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; in LowerCall() local
435 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
460 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
461 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
462 RegsToPass[i].second, Glue); in LowerCall()
477 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
478 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
479 RegsToPass[i].second, Glue); in LowerCall()
506 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
507 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1377 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
1395 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
1408 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); in LowerCall()
1450 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
1476 for (auto &Reg : RegsToPass) { in LowerCall()
1497 for (auto &Reg : RegsToPass) in LowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1193 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
1232 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1264 for (auto Reg : RegsToPass) { in LowerCall()
1277 for (auto Reg : RegsToPass) { in LowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h273 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
H A DSIISelLowering.cpp2268 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, in passSpecialInputs() argument
2336 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
2533 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
2547 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg); in LowerCall()
2552 RegsToPass.emplace_back(AMDGPU::SGPR4, ScratchWaveOffsetReg); in LowerCall()
2595 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2656 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain); in LowerCall()
2664 for (auto &RegToPass : RegsToPass) { in LowerCall()
2713 for (auto &RegToPass : RegsToPass) { in LowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.h629 SDValue &Arg, RegsToPassVector &RegsToPass,
H A DARMISelLowering.cpp1767 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
1856 RegsToPassVector RegsToPass; in LowerCall() local
1895 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, in LowerCall()
1900 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, in LowerCall()
1921 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1946 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
1987 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
1988 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
1989 RegsToPass[i].second, InFlag); in LowerCall()
2136 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1297 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; in LowerCall() local
1331 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
1372 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall()
1373 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCall()
1374 RegsToPass[I].second, Glue); in LowerCall()
1385 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCall()
1386 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCall()
1387 RegsToPass[I].second.getValueType())); in LowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2419 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo)); in Passv64i1ArgInRegs()
2527 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerReturn() local
2536 assert(2 == RegsToPass.size() && in LowerReturn()
2547 for (auto &Reg : RegsToPass) { in LowerReturn()
3722 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
3838 RegsToPass.push_back(std::make_pair( in LowerCall()
3878 RegsToPass.push_back(std::make_pair(unsigned(X86::AL), in LowerCall()
3968 RegsToPass[i].second, InFlag); in LowerCall()
4043 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
4044 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3655 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
3663 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall()
3711 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3784 for (auto &RegToPass : RegsToPass) { in LowerCall()
3842 for (auto &RegToPass : RegsToPass) in LowerCall()