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Searched refs:REG (Results 1 – 25 of 130) sorted by relevance

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/freebsd-12.1/contrib/binutils/opcodes/
H A Darc-opc.c1421 { "r0", 0, REG, 0 }, { "r1", 1, REG, 0 }, { "r2", 2, REG, 0 },
1422 { "r3", 3, REG, 0 }, { "r4", 4, REG, 0 }, { "r5", 5, REG, 0 },
1423 { "r6", 6, REG, 0 }, { "r7", 7, REG, 0 }, { "r8", 8, REG, 0 },
1424 { "r9", 9, REG, 0 }, { "r10", 10, REG, 0 }, { "r11", 11, REG, 0 },
1425 { "r12", 12, REG, 0 }, { "r13", 13, REG, 0 }, { "r14", 14, REG, 0 },
1426 { "r15", 15, REG, 0 }, { "r16", 16, REG, 0 }, { "r17", 17, REG, 0 },
1427 { "r18", 18, REG, 0 }, { "r19", 19, REG, 0 }, { "r20", 20, REG, 0 },
1428 { "r21", 21, REG, 0 }, { "r22", 22, REG, 0 }, { "r23", 23, REG, 0 },
1429 { "r24", 24, REG, 0 }, { "r25", 25, REG, 0 }, { "r26", 26, REG, 0 },
1439 { "r32", 32, REG, 0 }, { "r33", 33, REG, 0 }, { "r34", 34, REG, 0 },
[all …]
H A Dcr16-opc.c475 REG(r12_L, 12, CR16_R_REGTYPE),
476 REG(r13_L, 13, CR16_R_REGTYPE),
525 REG(dbs, 0, CR16_P_REGTYPE),
526 REG(dsr, 1, CR16_P_REGTYPE),
527 REG(dcr, 2, CR16_P_REGTYPE),
528 REG(car0, 4, CR16_P_REGTYPE),
529 REG(car1, 6, CR16_P_REGTYPE),
530 REG(cfg, 8, CR16_P_REGTYPE),
531 REG(psr, 9, CR16_P_REGTYPE),
533 REG(isp, 12, CR16_P_REGTYPE),
[all …]
/freebsd-12.1/sys/dev/uart/
H A Duart_dev_imx.c94 GETREG(bas, REG(UCR1)), GETREG(bas, REG(UCR2)),
95 GETREG(bas, REG(UCR3)), GETREG(bas, REG(UCR4)),
96 GETREG(bas, REG(USR1)), GETREG(bas, REG(USR2)));
198 reg = GETREG(bas, REG(UFCR)); in imx_uart_init()
200 SETREG(bas, REG(UFCR), reg); in imx_uart_init()
201 SETREG(bas, REG(UBIR), 15); in imx_uart_init()
210 reg = GETREG(bas, REG(UFCR)); in imx_uart_init()
214 SETREG(bas, REG(UFCR), reg); in imx_uart_init()
229 SETREG(bas, REG(UTXD), c); in imx_uart_putc()
248 c = GETREG(bas, REG(URXD)); in imx_uart_getc()
[all …]
H A Duart_dev_imx.h201 #define REG(_r) IMXUART_ ## _r ## _REG macro
216 #define ENA(_bas, _r, _b) SET((_bas), REG(_r), FLD(_r, _b))
217 #define DIS(_bas, _r, _b) CLR((_bas), REG(_r), FLD(_r, _b))
218 #define IS(_bas, _r, _b) IS_SET((_bas), REG(_r), FLD(_r, _b))
/freebsd-12.1/contrib/cortex-strings/src/thumb-2/
H A Dstrcpy.c37 #define magic1(REG) "#0x01010101" argument
38 #define magic2(REG) "#0x80808080" argument
40 #define magic1(REG) #REG argument
41 #define magic2(REG) #REG ", lsl #7" argument
/freebsd-12.1/sys/contrib/alpine-hal/
H A Dal_hal_udma_debug.h60 #define AL_UDMA_PRINT_REG(UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG) \ argument
61 al_dbg(PREFIX #REG " = 0x%08x" POSTFIX, al_reg_read32( \
62 &(UDMA->udma_regs->TYPE.GROUP.REG)))
65 UDMA, PREFIX, POSTFIX, FMT, TYPE, GROUP, REG, LBL, FIELD) \
67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
71 UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG, LBL, FIELD) \
73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
/freebsd-12.1/contrib/cortex-strings/benchmarks/dhry/
H A Ddhry_2.c20 #ifndef REG
21 #define REG macro
25 #define REG register macro
92 REG One_Fifty Int_Index; in Proc_8()
93 REG One_Fifty Int_Loc; in Proc_8()
139 REG One_Thirty Int_Loc; in Func_2()
H A Ddhry_1.c80 #define REG macro
84 #define REG register macro
87 void Proc_1 (REG Rec_Pointer Ptr_Val_Par);
126 REG One_Fifty Int_2_Loc; in main()
128 REG char Ch_Index; in main()
132 REG int Run_Index; in main()
133 REG int Number_Of_Runs; in main()
664 void Proc_1 (REG Rec_Pointer Ptr_Val_Par) in Proc_1()
669 REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp; in Proc_1()
/freebsd-12.1/contrib/binutils/bfd/
H A Dcpu-ia64-opc.c427 #define REG IA64_OPND_CLASS_REG macro
456 { REG, ins_reg, ext_reg, "b", {{ 3, 6}}, 0, /* B1 */
458 { REG, ins_reg, ext_reg, "b", {{ 3, 13}}, 0, /* B2 */
460 { REG, ins_reg, ext_reg, "cr", {{ 7, 20}}, 0, /* CR */
462 { REG, ins_reg, ext_reg, "f", {{ 7, 6}}, 0, /* F1 */
464 { REG, ins_reg, ext_reg, "f", {{ 7, 13}}, 0, /* F2 */
466 { REG, ins_reg, ext_reg, "f", {{ 7, 20}}, 0, /* F3 */
468 { REG, ins_reg, ext_reg, "f", {{ 7, 27}}, 0, /* F4 */
470 { REG, ins_reg, ext_reg, "p", {{ 6, 6}}, 0, /* P1 */
472 { REG, ins_reg, ext_reg, "p", {{ 6, 27}}, 0, /* P2 */
[all …]
/freebsd-12.1/contrib/gcc/
H A Ddf.h446 #define DF_REG_DEF_GET(DF, REG) ((DF)->def_info.regs[(REG)]) argument
447 #define DF_REG_DEF_SET(DF, REG, VAL) ((DF)->def_info.regs[(REG)]=(VAL)) argument
448 #define DF_REG_DEF_COUNT(DF, REG) ((DF)->def_info.regs[(REG)]->n_refs) argument
449 #define DF_REG_USE_GET(DF, REG) ((DF)->use_info.regs[(REG)]) argument
450 #define DF_REG_USE_SET(DF, REG, VAL) ((DF)->use_info.regs[(REG)]=(VAL)) argument
451 #define DF_REG_USE_COUNT(DF, REG) ((DF)->use_info.regs[(REG)]->n_refs) argument
H A Daddresses.h34 if (index_code == REG) in base_reg_class()
59 if (index_code == REG) in ok_for_base_p_1()
H A Dregrename.c572 else if (code0 == REG && code1 == REG) in scan_rtx_address()
578 && regno_ok_for_base_p (regno1, mode, PLUS, REG)) in scan_rtx_address()
596 else if (code0 == REG) in scan_rtx_address()
602 else if (code1 == REG) in scan_rtx_address()
637 case REG: in scan_rtx_address()
678 case REG: in scan_rtx()
1496 else if (code0 == REG && code1 == REG) in replace_oldest_value_addr()
1502 && regno_ok_for_base_p (regno1, mode, PLUS, REG)) in replace_oldest_value_addr()
1520 else if (code0 == REG) in replace_oldest_value_addr()
1526 else if (code1 == REG) in replace_oldest_value_addr()
[all …]
H A Dregclass.c2022 else if (code0 == REG && code1 == REG in record_address_regs()
2024 && (ok_for_base_p_nonstrict (arg0, mode, PLUS, REG) in record_address_regs()
2027 ok_for_base_p_nonstrict (arg0, mode, PLUS, REG) in record_address_regs()
2029 PLUS, REG, scale); in record_address_regs()
2030 else if (code0 == REG && code1 == REG in record_address_regs()
2032 && (ok_for_base_p_nonstrict (arg1, mode, PLUS, REG) in record_address_regs()
2037 PLUS, REG, scale); in record_address_regs()
2043 else if ((code0 == REG && REG_POINTER (arg0)) in record_address_regs()
2049 else if ((code1 == REG && REG_POINTER (arg1)) in record_address_regs()
2099 case REG: in record_address_regs()
[all …]
H A Dgensupport.c1329 LABEL_REF, SUBREG, REG, MEM }},
1331 LABEL_REF, SUBREG, REG, MEM,
1333 {"register_operand", false, {SUBREG, REG}},
1334 {"pmode_register_operand", true, {SUBREG, REG}},
1335 {"scratch_operand", false, {SCRATCH, REG}},
1340 {"nonimmediate_operand", false, {SUBREG, REG, MEM}},
1342 LABEL_REF, SUBREG, REG}},
1379 if (code != REG in init_predicate_table()
H A Dbasic-block.h75 #define CLEAR_REGNO_REG_SET(HEAD, REG) bitmap_clear_bit (HEAD, REG) argument
78 #define SET_REGNO_REG_SET(HEAD, REG) bitmap_set_bit (HEAD, REG) argument
81 #define REGNO_REG_SET_P(TO, REG) bitmap_bit_p (TO, REG) argument
/freebsd-12.1/contrib/gcc/config/arm/
H A Dpredicates.md30 return (GET_CODE (op) == REG
49 return (GET_CODE (op) == REG
62 return (GET_CODE (op) == REG
125 || (GET_CODE (op) == REG
292 if (GET_CODE (SET_DEST (elt)) != REG
293 || GET_CODE (XEXP (SET_SRC (elt), 0)) != REG
314 || GET_CODE (SET_DEST (elt)) != REG
349 if (GET_CODE (SET_DEST (elt)) != REG
371 || GET_CODE (SET_SRC (elt)) != REG
438 return (GET_CODE (op) == REG
[all …]
H A Darm.c1683 || (GET_CODE (target) == REG && GET_CODE (source) == REG in arm_split_constant()
5163 if (c == REG) in arm_thumb_address_cost()
5876 == REG) in load_multiple_sequence()
6103 == REG) in store_multiple_sequence()
8750 if (code0 == REG) in output_move_double()
8760 case REG: in output_move_double()
8929 case REG: in output_move_double()
9133 case REG: in shift_op()
11330 case REG: in arm_print_operand()
14187 case REG: in thumb_load_double_from_address()
[all …]
H A Darm.h1121 || ((GET_CODE (X) == REG || GET_CODE (X) == SUBREG) \
1137 && GET_CODE (XEXP (X, 0)) == REG \
1968 (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X))
1971 (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X))
2284 if (GET_CODE (X) == REG) \
2291 if (GET_CODE (base) != REG) \
2309 case REG: \
2338 gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \
2376 if (GET_CODE (X) == REG) \
2382 gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \
/freebsd-12.1/contrib/gcc/config/s390/
H A Dpredicates.md168 if (GET_CODE (XEXP (op, 0)) != REG
188 if (GET_CODE (XEXP (op, 0)) != REG
233 if (GET_CODE (XEXP (op, 0)) != REG
281 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
291 if (GET_CODE (src_addr) == REG)
294 && GET_CODE (XEXP (src_addr, 0)) == REG
308 || GET_CODE (SET_DEST (elt)) != REG
340 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
349 if (GET_CODE (dest_addr) == REG)
352 && GET_CODE (XEXP (dest_addr, 0)) == REG
[all …]
/freebsd-12.1/sys/dev/pci/
H A Dpci.c642 #undef REG in pci_hdrtypedata()
652 vid = REG(PCIR_VENDOR, 2); in pci_read_device()
653 did = REG(PCIR_DEVICE, 2); in pci_read_device()
690 cfg->revid = REG(PCIR_REVID, 1); in pci_fill_devinfo()
732 #undef REG
770 val = REG(ptr, 4); in pci_ea_fill_info()
775 dw[b] = REG(ptr, 4); in pci_ea_fill_info()
807 #undef REG
1322 #undef REG in pci_read_vpd()
4096 #undef REG in pci_add_children()
[all …]
/freebsd-12.1/sys/dev/ncr/
H A Dncrreg.h260 #define REG(r) REGJ (nc_, r) macro
426 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | ((data)<<8ul))
429 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | ((data)<<8ul))
432 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | ((data)<<8ul))
/freebsd-12.1/contrib/gcc/config/rs6000/
H A Dpredicates.md38 (match_test "GET_CODE (op) != REG
87 (match_test "(GET_CODE (op) != REG
97 (match_test "GET_CODE (op) != REG
104 (match_test "GET_CODE (op) != REG
884 || GET_CODE (SET_SRC (elt)) != REG
923 || GET_CODE (SET_SRC (elt)) != REG
933 || GET_CODE (SET_SRC (elt)) != REG
944 || GET_CODE (SET_SRC (elt)) != REG
1091 if (GET_CODE (src_reg) != REG
1131 if (GET_CODE (src_reg) != REG
[all …]
/freebsd-12.1/sys/dev/sym/
H A Dsym_defs.h552 #define REG(r) REGJ (nc_, r) macro
731 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
734 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
737 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
803 (0xe1000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
806 (0xe0000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
/freebsd-12.1/contrib/binutils/include/opcode/
H A Darc.h278 #define ARC_REG_CONSTANT_P(REG) ((REG) >= 61) argument
/freebsd-12.1/contrib/gcc/config/sparc/
H A Dsparc.h1301 || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \
1320 || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \
1938 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1940 && GET_CODE (SUBREG_REG (X)) == REG \
1944 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1946 && GET_CODE (SUBREG_REG (X)) == REG \
2397 if (GET_CODE (addr) == REG) \
2422 else if (GET_CODE (index) == REG) \

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