Searched refs:POSTING_READ (Results 1 – 19 of 19) sorted by relevance
209 POSTING_READ(reg); in ibx_write_infoframe()250 POSTING_READ(reg); in cpt_write_infoframe()288 POSTING_READ(reg); in vlv_write_infoframe()392 POSTING_READ(reg); in g4x_set_infoframes()422 POSTING_READ(reg); in g4x_set_infoframes()448 POSTING_READ(reg); in ibx_set_infoframes()482 POSTING_READ(reg); in ibx_set_infoframes()507 POSTING_READ(reg); in cpt_set_infoframes()517 POSTING_READ(reg); in cpt_set_infoframes()551 POSTING_READ(reg); in vlv_set_infoframes()[all …]
50 POSTING_READ(DEIMR); in ironlake_enable_display_irq()60 POSTING_READ(DEIMR); in ironlake_disable_display_irq()73 POSTING_READ(reg); in i915_enable_pipestat()85 POSTING_READ(reg); in i915_disable_pipestat()735 POSTING_READ(DEIER); in ivybridge_irq_handler()762 POSTING_READ(DEIER); in ironlake_irq_handler()1430 POSTING_READ(EIR); in i915_report_and_clear_eir()2257 POSTING_READ(IER); in i915_irq_preinstall()2295 POSTING_READ(IER); in i915_irq_postinstall()2472 POSTING_READ(IER); in i965_irq_preinstall()[all …]
188 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()226 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()235 POSTING_READ(_FDI_RXA_MISC); in hsw_fdi_link_train()264 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()270 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()277 POSTING_READ(_FDI_RXA_MISC); in hsw_fdi_link_train()774 POSTING_READ(SPLL_CTL); in intel_ddi_put_crtc_pll()784 POSTING_READ(WRPLL_CTL1); in intel_ddi_put_crtc_pll()794 POSTING_READ(WRPLL_CTL2); in intel_ddi_put_crtc_pll()1384 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()[all …]
147 POSTING_READ(SPRSURF(pipe)); in ivb_update_plane()164 POSTING_READ(SPRSURF(pipe)); in ivb_disable_plane()194 POSTING_READ(SPRKEYMSK(intel_plane->pipe)); in ivb_update_colorkey()307 POSTING_READ(DVSSURF(pipe)); in ilk_update_plane()323 POSTING_READ(DVSSURF(pipe)); in ilk_disable_plane()384 POSTING_READ(DVSKEYMSK(intel_plane->pipe)); in ilk_update_colorkey()
1461 POSTING_READ(reg); in intel_enable_pll()1464 POSTING_READ(reg); in intel_enable_pll()1467 POSTING_READ(reg); in intel_enable_pll()1496 POSTING_READ(reg); in intel_disable_pll()1606 POSTING_READ(reg); in ironlake_enable_pch_pll()1650 POSTING_READ(reg); in intel_disable_pch_pll()2127 POSTING_READ(reg); in i9xx_update_plane()2218 POSTING_READ(reg); in ironlake_update_plane()2428 POSTING_READ(reg); in intel_fdi_normal_train()2499 POSTING_READ(reg); in ironlake_fdi_link_train()[all …]
1040 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_vdd_on()1063 POSTING_READ(PCH_PP_CONTROL); in ironlake_panel_vdd_off_sync()1133 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1141 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1148 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1170 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_off()1199 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_backlight_on()1219 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_backlight_off()1245 POSTING_READ(DP_A); in ironlake_edp_pll_on()1270 POSTING_READ(DP_A); in ironlake_edp_pll_off()[all …]
759 POSTING_READ(GTIMR); in gen5_ring_get_irq()776 POSTING_READ(GTIMR); in gen5_ring_put_irq()794 POSTING_READ(IMR); in i9xx_ring_get_irq()811 POSTING_READ(IMR); in i9xx_ring_put_irq()879 POSTING_READ(mmio); in intel_ring_setup_status_page()940 POSTING_READ(GTIMR); in gen6_ring_get_irq()961 POSTING_READ(GTIMR); in gen6_ring_put_irq()1492 POSTING_READ(RING_TAIL(ring->mmio_base)); in gen6_bsd_ring_write_tail()
468 POSTING_READ(dpll_a_reg); in i915_restore_modeset_reg()475 POSTING_READ(dpll_a_reg); in i915_restore_modeset_reg()479 POSTING_READ(_DPLL_A_MD); in i915_restore_modeset_reg()537 POSTING_READ(dpll_b_reg); in i915_restore_modeset_reg()544 POSTING_READ(dpll_b_reg); in i915_restore_modeset_reg()548 POSTING_READ(_DPLL_B_MD); in i915_restore_modeset_reg()802 POSTING_READ(VGA_PD); in i915_restore_display()
195 POSTING_READ(GEN6_BLITTER_ECOSKPD); in sandybridge_blit_fbc_update()2379 POSTING_READ(VIDSTART); in ironlake_enable_drps()2476 POSTING_READ(GEN6_RPNSWREQ); in gen6_set_rps()2752 POSTING_READ(PWRCTXA); in ironlake_disable_rc6()2755 POSTING_READ(RSTDBYCTL); in ironlake_disable_rc6()3385 POSTING_READ(ECR); in intel_init_emon()4300 POSTING_READ(ECOBUS); in __gen6_gt_force_wake_mt_reset()4318 POSTING_READ(ECOBUS); in __gen6_gt_force_wake_mt_get()4355 POSTING_READ(ECOBUS); in __gen6_gt_force_wake_put()4363 POSTING_READ(ECOBUS); in __gen6_gt_force_wake_mt_put()[all …]
278 POSTING_READ(PCH_ADPA); in intel_ironlake_crt_detect_hotplug()504 POSTING_READ(pipeconf_reg); in intel_crt_load_detect()667 POSTING_READ(PCH_ADPA); in intel_crt_reset()
690 POSTING_READ(D_STATE); in i8xx_do_reset()697 POSTING_READ(DEBUG_RESET_I830); in i8xx_do_reset()701 POSTING_READ(DEBUG_RESET_I830); in i8xx_do_reset()707 POSTING_READ(D_STATE); in i8xx_do_reset()
177 POSTING_READ(bus->gpio_reg); in set_clock()195 POSTING_READ(bus->gpio_reg); in set_data()
135 POSTING_READ(lvds_reg); in intel_enable_lvds()171 POSTING_READ(lvds_reg); in intel_disable_lvds()
351 POSTING_READ(reg); in intel_panel_enable_backlight()
2817 POSTING_READ(FENCE_REG_SANDYBRIDGE_0 + reg * 8); in sandybridge_write_fence_reg()2840 POSTING_READ(FENCE_REG_965_0 + reg * 8); in i965_write_fence_reg()2884 POSTING_READ(reg); in i915_write_fence_reg()2916 POSTING_READ(FENCE_REG_830_0 + reg * 4); in i830_write_fence_reg()4178 POSTING_READ(GEN7_MISCCPCTL); in i915_gem_l3_remap()4191 POSTING_READ(GEN7_L3LOG_BASE); in i915_gem_l3_remap()
1222 POSTING_READ(TV_DAC); in intel_tv_detect_type()1252 POSTING_READ(TV_CTL); in intel_tv_detect_type()
481 POSTING_READ(GFX_FLSH_CNTL_GEN6); in gen6_ggtt_bind_object()
1252 POSTING_READ(intel_sdvo->sdvo_reg); in intel_disable_sdvo()1256 POSTING_READ(intel_sdvo->sdvo_reg); in intel_disable_sdvo()
1749 #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) macro