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Searched refs:OutRegs (Results 1 – 8 of 8) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h405 std::set<unsigned> &OutRegs);
482 std::set<unsigned> OutRegs; in getOutRegs() local
484 OutRegs.insert(RegMaskPair.RegUnit); in getOutRegs()
486 return OutRegs; in getOutRegs()
H A DSIMachineScheduler.cpp1520 const std::set<unsigned> &OutRegs = Block->getOutRegs(); in SIScheduleBlockScheduler() local
1522 if (OutRegs.find(Reg) == OutRegs.end()) in SIScheduleBlockScheduler()
1748 std::set<unsigned> &OutRegs) { in checkRegUsageImpact() argument
1764 for (unsigned Reg : OutRegs) { in checkRegUsageImpact()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DFastISel.h97 SmallVector<unsigned, 16> OutRegs; member
193 OutRegs.clear(); in clearOuts()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86FastISel.cpp3191 auto &OutRegs = CLI.OutRegs; in fastLowerCall() local
3417 OutRegs.push_back(VA.getLocReg()); in fastLowerCall()
3541 for (auto Reg : OutRegs) in fastLowerCall()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1230 CLI.OutRegs.push_back(VA.getLocReg()); in processCallArgs()
1561 for (auto Reg : CLI.OutRegs) in fastLowerCall()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp981 unsigned NumCallRegArgs = IsAnyRegCC ? NumArgs : CLI.OutRegs.size(); in selectPatchpoint()
999 for (auto Reg : CLI.OutRegs) in selectPatchpoint()
H A DSelectionDAGBuilder.cpp7942 RegsForValue &OutRegs = IndirectStoresToEmit[i].first; in visitInlineAsm() local
7944 SDValue OutVal = OutRegs.getCopyFromRegs(DAG, FuncInfo, getCurSDLoc(), in visitInlineAsm()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3084 CLI.OutRegs.push_back(VA.getLocReg()); in processCallArgs()
3269 for (auto Reg : CLI.OutRegs) in fastLowerCall()