| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1972 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
1973 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
1978 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument
1979 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
1980 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
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| /freebsd-12.1/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 4321 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
4322 if (OrigVT.getSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
4327 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
4328 if (OrigVT.getSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 293 EVT OrigVT = VT; in ExpandConstantFP() local
304 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
305 TLI.ShouldShrinkFPConstant(OrigVT)) { in ExpandConstantFP()
319 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
325 OrigVT, dl, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3274 static unsigned CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
3307 if (Flags.isSplit() && OrigVT != MVT::ppcf128) in CalculateStackSlotAlignment()
3308 Align = OrigVT.getStoreSize(); in CalculateStackSlotAlignment()
3320 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, in CalculateStackSlotUsed() argument
3332 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
3729 EVT OrigVT = Ins[ArgNo].ArgVT; in LowerFormalArguments_64SVR4() local
3743 Align = CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); in LowerFormalArguments_64SVR4()
5663 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
5717 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in LowerCall_64SVR4()
5787 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2506 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
2507 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
2508 return OrigVT; in getExtensionTo64Bits()
2510 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
2512 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7227 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
7228 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
7229 return OrigVT; in getExtensionTo64Bits()
7231 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
7233 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13714 MVT OrigVT = V.getSimpleValueType(); in splitAndLowerVectorShuffle() local
13715 int OrigNumElements = OrigVT.getVectorNumElements(); in splitAndLowerVectorShuffle()
13717 MVT OrigScalarVT = OrigVT.getVectorElementType(); in splitAndLowerVectorShuffle()
26108 MVT OrigVT = VT; in LowerMGATHER() local
26131 SDValue Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OrigVT, in LowerMGATHER()
38659 EVT OrigVT = N->getValueType(0); in combineFneg() local
38680 return DAG.getBitcast(OrigVT, NewNode); in combineFneg()
38702 return DAG.getBitcast(OrigVT, DAG.getNode(NewOpcode, DL, VT, in combineFneg()
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