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Searched refs:MicroOpBufferSize (Results 1 – 25 of 41) sorted by relevance

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/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCSchedule.h273 unsigned MicroOpBufferSize; member
333 bool isOutOfOrder() const { return MicroOpBufferSize > 1; } in isOutOfOrder()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSISchedule.td50 // MicroOpBufferSize = 1 means that instructions will always be added
53 let MicroOpBufferSize = 1;
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMScheduleM3.td16 let MicroOpBufferSize = 0; // In-order
H A DARMScheduleSwift.td43 let MicroOpBufferSize = 45; // Based on NEON renamed registers.
/freebsd-12.1/contrib/llvm/lib/MCA/HardwareUnits/
H A DRetireControlUnit.cpp25 AvailableSlots(SM.MicroOpBufferSize), MaxRetirePerCycle(0) { in RetireControlUnit()
/freebsd-12.1/contrib/llvm/tools/llvm-mca/Views/
H A DRetireControlUnitStatistics.cpp24 TotalROBEntries = SM.MicroOpBufferSize; in RetireControlUnitStatistics()
H A DTimelineView.cpp154 STI.getSchedModel().MicroOpBufferSize); in printWaitTimeEntry()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h158 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } in getMicroOpBufferSize()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiSchedule.td49 let MicroOpBufferSize = 0;
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64SchedFalkor.td21 let MicroOpBufferSize = 128; // Out-of-order with temporary unified issue buffer.
H A DAArch64SchedKryo.td22 let MicroOpBufferSize = 128; // Out-of-order with temporary unified issue buffer
H A DAArch64SchedThunderX.td23 let MicroOpBufferSize = 0; // ThunderX T88/T81/T83 are in-order.
H A DAArch64SchedA53.td20 let MicroOpBufferSize = 0; // Explicitly set to zero since A53 is in-order.
H A DAArch64SchedCyclone.td17 let MicroOpBufferSize = 192; // Based on the reorder buffer.
H A DAArch64SchedExynosM1.td22 let MicroOpBufferSize = 96; // ROB size.
H A DAArch64SchedA57.td26 let MicroOpBufferSize = 128; // 128 micro-op re-order buffer
H A DAArch64SchedExynosM3.td22 let MicroOpBufferSize = 228; // ROB size.
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSchedule.td81 int MicroOpBufferSize = -1; // Max micro-ops that can be buffered.
158 // MicroOpBufferSize, which should be the minimum size of either the
554 // field MicroOpBufferSize in SchedModel if the reorder buffer size is unknown.
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td40 let MicroOpBufferSize = 44;
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86Schedule.td670 // MicroOpBufferSize > 1 indicates that RAW dependencies can be
684 let MicroOpBufferSize = 32;
H A DX86ScheduleSLM.td19 let MicroOpBufferSize = 32; // Based on the reorder buffer.
H A DX86ScheduleZnver1.td18 // Based on the reorder buffer we define MicroOpBufferSize
19 let MicroOpBufferSize = 192;
H A DX86ScheduleAtom.td22 let MicroOpBufferSize = 0; // In-order execution, always hide latency.
H A DX86ScheduleBtVer2.td20 let MicroOpBufferSize = 64; // Retire Control Unit
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsScheduleP5600.td12 int MicroOpBufferSize = 48; // min(48, 48, 64)

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