Searched refs:MCRegisterClass (Results 1 – 14 of 14) sorted by relevance
67 const MCRegisterClass *GPR32RegClass;68 const MCRegisterClass *GPR64RegClass;69 const MCRegisterClass *FGR32RegClass;70 const MCRegisterClass *FGR64RegClass;71 const MCRegisterClass *AFGR64RegClass;72 const MCRegisterClass *MSA128BRegClass;73 const MCRegisterClass *COP0RegClass;74 const MCRegisterClass *COP2RegClass;75 const MCRegisterClass *COP3RegClass;
33 class MCRegisterClass {131 using regclass_iterator = const MCRegisterClass *;154 const MCRegisterClass *Classes; // Pointer to the regclass array241 const MCRegisterClass *C, unsigned NC, in InitMCRegisterInfo()352 const MCRegisterClass *RC) const;433 const MCRegisterClass& getRegClass(unsigned i) const { in getRegClass()438 const char *getRegClassName(const MCRegisterClass *Class) const { in getRegClassName()
36 class MCRegisterClass; variable430 unsigned getRegBitWidth(const MCRegisterClass &RC);
687 const MCRegisterClass SGPRClass = TRI->getRegClass(AMDGPU::SReg_32RegClassID); in isSGPR()832 unsigned getRegBitWidth(const MCRegisterClass &RC) { in getRegBitWidth()
25 const MCRegisterClass *RC) const { in getMatchingSuperReg()
410 const MCRegisterClass &GR32RC = MRI.getRegClass(X86::GR32RegClassID); in clearsSuperRegisters()411 const MCRegisterClass &VR128XRC = MRI.getRegClass(X86::VR128XRegClassID); in clearsSuperRegisters()412 const MCRegisterClass &VR256XRC = MRI.getRegClass(X86::VR256XRegClassID); in clearsSuperRegisters()
89 const MCRegisterClass &RC = MRI.getRegClass(RCE.RegisterClassID); in addRegisterFile()
52 const MCRegisterClass *MC;
77 MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID]; in toDREG()
250 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID); in printInst()
1279 const MCRegisterClass &FPR128RC = in printVectorList()
3781 const MCRegisterClass *RC; in parseRegisterList()4157 const MCRegisterClass *RC = (Spacing == 1) ? in parseVectorList()4169 const MCRegisterClass *RC = (Spacing == 1) ? in parseVectorList()6039 const MCRegisterClass &GPR = MRI->getRegClass(ARM::GPRRegClassID); in fixupGNULDRDAlias()6264 const MCRegisterClass& MRC = MRI->getRegClass(ARM::GPRRegClassID); in ParseInstruction()
5606 const MCRegisterClass &WRegClass = in tryParseGPRSeqPair()5608 const MCRegisterClass &XRegClass = in tryParseGPRSeqPair()
1790 const MCRegisterClass RC = TRI->getRegClass(RCID); in ParseAMDGPURegister()