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Searched refs:Ld (Results 1 – 25 of 45) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/
H A DLoopVersioningLICM.cpp376 LoadInst *Ld = dyn_cast<LoadInst>(I); in instructionSafeForVersioning() local
377 if (!Ld || !Ld->isSimple()) { in instructionSafeForVersioning()
382 Value *Ptr = Ld->getPointerOperand(); in instructionSafeForVersioning()
H A DLoopUnrollAndJamPass.cpp260 if (auto *Ld = dyn_cast<LoadInst>(&I)) { in computeUnrollAndJamCount() local
261 Value *V = Ld->getPointerOperand(); in computeUnrollAndJamCount()
H A DGVNHoist.cpp981 if (auto *Ld = dyn_cast<LoadInst>(Repl)) { in makeGepOperandsAvailable() local
982 Gep = dyn_cast<GetElementPtrInst>(Ld->getPointerOperand()); in makeGepOperandsAvailable()
H A DLoopInterchange.cpp98 if (auto *Ld = dyn_cast<LoadInst>(&I)) { in populateDependencyMatrix() local
99 if (!Ld->isSimple()) in populateDependencyMatrix()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp846 if (LoadInst *Ld = dyn_cast<LoadInst>(I->getOperand(0))) in getCmpSelInstrCost() local
848 if (!Ld->hasOneUse() && Ld->getParent() == I->getParent() && in getCmpSelInstrCost()
889 isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue) { in isFoldableLoad() argument
890 if (!Ld->hasOneUse()) in isFoldableLoad()
892 FoldedValue = Ld; in isFoldableLoad()
893 const Instruction *UserI = cast<Instruction>(*Ld->user_begin()); in isFoldableLoad()
894 unsigned LoadedBits = getScalarSizeInBits(Ld->getType()); in isFoldableLoad()
H A DSystemZTargetTransformInfo.h90 bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue);
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DGCRootLowering.cpp217 Value *Ld = new LoadInst(CI->getArgOperand(1), "", CI); in DoLowering() local
218 Ld->takeName(CI); in DoLowering()
219 CI->replaceAllUsesWith(Ld); in DoLowering()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMParallelDSP.cpp79 if (auto *Ld = dyn_cast<LoadInst>(V)) in SetMemoryLocations() local
80 MemLocs.push_back(MemoryLocation(Ld->getPointerOperand(), Size)); in SetMemoryLocations()
312 auto *Ld = dyn_cast<LoadInst>(&I); in RecordSequentialLoads() local
313 if (!Ld) in RecordSequentialLoads()
315 Loads.push_back(Ld); in RecordSequentialLoads()
H A DARMCodeGenPrepare.cpp211 if (auto *Ld = dyn_cast<LoadInst>(V)) in isSupportedType() local
212 Ty = cast<PointerType>(Ld->getPointerOperandType())->getElementType(); in isSupportedType()
H A DARMISelDAGToDAG.cpp3417 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select() local
3420 CurDAG->setNodeMemRefs(cast<MachineSDNode>(Ld), {MemOp}); in Select()
3423 SDValue OutChain = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1); in Select()
3427 Result = SDValue(Ld, 0); in Select()
3432 dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); in Select()
3440 Result = SDValue(Ld, 1); in Select()
3445 dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); in Select()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1203 SDValue SuperReg = SDValue(Ld, 0); in SelectLoad()
1208 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 1)); in SelectLoad()
1233 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 0)); in SelectPostLoad()
1236 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoad()
1245 ReplaceUses(SDValue(N, NumVecs + 1), SDValue(Ld, 2)); in SelectPostLoad()
1348 SDValue SuperReg = SDValue(Ld, 0); in SelectLoadLane()
1360 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 1)); in SelectLoadLane()
1394 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 0)); in SelectPostLoadLane()
1397 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoadLane()
1415 ReplaceUses(SDValue(N, NumVecs + 1), SDValue(Ld, 2)); in SelectPostLoadLane()
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/freebsd-12.1/contrib/llvm/lib/Analysis/
H A DLoopAccessAnalysis.cpp1809 auto *Ld = dyn_cast<LoadInst>(&I); in analyzeLoop() local
1810 if (!Ld || (!Ld->isSimple() && !IsAnnotatedParallel)) { in analyzeLoop()
1811 recordAnalysis("NonSimpleLoad", Ld) in analyzeLoop()
1818 Loads.push_back(Ld); in analyzeLoop()
1819 DepChecker->addAccess(Ld); in analyzeLoop()
1821 collectStridedAccess(Ld); in analyzeLoop()
/freebsd-12.1/contrib/gcc/config/mips/
H A Dsr71k.md48 ;; Floating point stores go to Ld/St and go to MOV in the floating point
51 ;; Floating point loads go to Ld/St and go to LOAD in the floating point
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstrFragmentsSIMD.td713 auto *Ld = cast<LoadSDNode>(N);
714 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
768 auto *Ld = cast<LoadSDNode>(N);
770 Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
H A DX86ISelLowering.cpp7460 (Ld && Ld.getOpcode() == ISD::ZERO_EXTEND && in lowerBuildVectorAsBroadcast()
20533 SDLoc dl(Ld); in LowerLoad()
20544 Ld->getPointerInfo(), Ld->getAlignment(), in LowerLoad()
20589 Load = DAG.getLoad(MemVT, dl, Ld->getChain(), Ld->getBasePtr(), in LowerLoad()
20590 Ld->getPointerInfo(), Ld->getAlignment(), in LowerLoad()
20604 Ld->getPointerInfo(), MemVT, Ld->getAlignment(), in LowerLoad()
27074 SDValue Res = DAG.getLoad(LdVT, dl, Ld->getChain(), Ld->getBasePtr(), in ReplaceNodeResults()
36224 if (!Ld) in combineAndLoadToBZHI()
37252 SDLoc dl(Ld); in combineLoad()
37898 SDLoc LdDL(Ld); in combineStore()
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H A DX86Schedule.td51 def Ld : SchedWrite;
54 let Folded = !cast<SchedWrite>(NAME#"Ld");
/freebsd-12.1/contrib/llvm/lib/Transforms/Utils/
H A DLoopUnrollAndJam.cpp592 if (auto *Ld = dyn_cast<LoadInst>(&I)) { in getLoadsAndStores() local
593 if (!Ld->isSimple()) in getLoadsAndStores()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp2102 auto Ld = cast<LoadSDNode>(N); in isUniformLoad() local
2104 return Ld->getAlignment() >= 4 && in isUniformLoad()
2108 Ld->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS || in isUniformLoad()
2109 Ld->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT in isUniformLoad()
2117 Ld->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && in isUniformLoad()
2118 !Ld->isVolatile() && in isUniformLoad()
H A DSIISelLowering.cpp6369 if (Ld->getAlignment() < 4 || Ld->isDivergent()) in widenLoad()
6373 unsigned AS = Ld->getAddressSpace(); in widenLoad()
6382 EVT MemVT = Ld->getMemoryVT(); in widenLoad()
6387 SDLoc SL(Ld); in widenLoad()
6393 SDValue Ptr = Ld->getBasePtr(); in widenLoad()
6396 Ld->getOffset(), in widenLoad()
6398 Ld->getAlignment(), in widenLoad()
6400 Ld->getAAInfo(), in widenLoad()
6411 if (Ld->getExtensionType() == ISD::SEXTLOAD) { in widenLoad()
6418 assert(Ld->getExtensionType() == ISD::EXTLOAD); in widenLoad()
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H A DSIISelLowering.h79 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const;
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp3384 LoadSDNode *Ld = cast<LoadSDNode>(N); in ReplaceNodeResults() local
3387 if (Ld->getValueType(0) != MVT::i64 || Ld->getMemoryVT() != MVT::i64) in ReplaceNodeResults()
3392 Ld->getExtensionType(), dl, MVT::v2i32, Ld->getChain(), in ReplaceNodeResults()
3393 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), in ReplaceNodeResults()
3394 Ld->getMemOperand()->getFlags(), Ld->getAAInfo()); in ReplaceNodeResults()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h2417 const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N);
2418 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
2419 Ld->getAddressingMode() == ISD::UNINDEXED;
/freebsd-12.1/contrib/llvm/tools/clang/lib/Analysis/
H A DThreadSafetyCommon.cpp833 til::SExpr *Ld = new (Arena) til::Load(Lp); in enterCFG() local
834 til::SExpr *V = addStatement(Ld, nullptr, Pm); in enterCFG()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCommonGEP.cpp1029 if (LoadInst *Ld = dyn_cast<LoadInst>(R)) { in separateConstantChains() local
1031 if (&Ld->getOperandUse(PtrX) == U) in separateConstantChains()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp14366 auto *Ld = cast<LoadSDNode>(Val); in getStoreMergeCandidates() local
14367 LBasePtr = BaseIndexOffset::match(Ld, DAG); in getStoreMergeCandidates()
14368 LoadVT = Ld->getMemoryVT(); in getStoreMergeCandidates()
14373 if (!Ld->hasNUsesOfValue(1, 0)) in getStoreMergeCandidates()
14376 if (Ld->isVolatile() || Ld->isIndexed()) in getStoreMergeCandidates()
14817 LoadSDNode *Ld = cast<LoadSDNode>(Val); in MergeConsecutiveStores() local
15254 if (Ld->getBasePtr() == Ptr && ST->getMemoryVT() == Ld->getMemoryVT() && in visitSTORE()
17036 if (!Ld || Ld->getExtensionType() || Ld->isVolatile() || !ExtIdx) in narrowExtractedVectorLoad()
17042 if (!TLI.shouldReduceLoadWidth(Ld, Ld->getExtensionType(), VT)) in narrowExtractedVectorLoad()
17048 SDValue BaseAddr = Ld->getOperand(1); in narrowExtractedVectorLoad()
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