| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 42 LaneBitmask LaneMask; member
44 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
45 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
266 LaneBitmask LaneMask;
268 IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
269 : Index(Index), LaneMask(LaneMask) {}
302 return I->LaneMask;
312 InsertRes.first->LaneMask |= Pair.LaneMask;
325 LaneBitmask PrevMask = I->LaneMask;
326 I->LaneMask &= ~Pair.LaneMask;
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| H A D | LiveInterval.h | 648 LaneBitmask LaneMask; variable
651 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument
654 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
656 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange()
734 LaneBitmask LaneMask) { in createSubRange() argument
735 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
743 LaneBitmask LaneMask, in createSubRangeFrom() argument
745 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
779 LaneBitmask LaneMask,
793 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
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| H A D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask; member
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| H A D | MachineBasicBlock.h | 75 LaneBitmask LaneMask;
77 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
78 : PhysReg(PhysReg), LaneMask(LaneMask) {}
306 LaneBitmask LaneMask = LaneBitmask::getAll()) {
307 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
328 LaneBitmask LaneMask = LaneBitmask::getAll());
332 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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| H A D | TargetRegisterInfo.h | 55 const LaneBitmask LaneMask; variable
196 return LaneMask; in getLaneMask()
619 LaneBitmask LaneMask) const { in reverseComposeSubRegIndexLaneMask() argument
621 return LaneMask; in reverseComposeSubRegIndexLaneMask()
622 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in reverseComposeSubRegIndexLaneMask()
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| H A D | LiveIntervals.h | 468 LaneBitmask LaneMask);
478 LaneBitmask LaneMask = LaneBitmask::getAll());
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 102 if (!P.LaneMask.all()) in dump()
110 if (!P.LaneMask.all()) in dump()
363 return I->LaneMask; in getRegLanes()
376 I->LaneMask |= Pair.LaneMask; in addRegLanes()
400 I->LaneMask &= ~Pair.LaneMask; in removeRegLanes()
401 if (I->LaneMask.none()) in removeRegLanes()
609 LaneBitmask LaneMask = I->LaneMask & LiveBefore; in adjustLaneLiveness() local
610 if (LaneMask.none()) { in adjustLaneLiveness()
613 I->LaneMask = LaneMask; in adjustLaneLiveness()
713 PrevMask = I->LaneMask; in discoverLiveInOrOut()
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| H A D | MachineVerifier.cpp | 528 if (LaneMask.any()) in report_context()
529 report_context_lanemask(LaneMask); in report_context()
1482 LaneBitmask LaneMask) { in checkLivenessAtUse() argument
1496 if (LaneMask.any()) in checkLivenessAtUse()
1511 if (LaneMask.any()) in checkLivenessAtDef()
1520 if (LaneMask.any()) in checkLivenessAtDef()
1539 if (LaneMask.any()) in checkLivenessAtDef()
2030 if (LaneMask.any() && in verifyLiveRangeValue()
2176 if (LaneMask.any() && (LaneMask & SLM).none()) in verifyLiveRangeSegment()
2218 if (LaneMask.any()) { in verifyLiveRangeSegment()
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| H A D | ScheduleDAGInstrs.cpp | 412 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
419 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps()
429 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
431 if (LaneMask.any()) { in addVRegDefDeps()
432 I->LaneMask = LaneMask; in addVRegDefDeps()
450 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
454 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps()
473 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
474 LaneBitmask NonOverlapMask = V2SU.LaneMask & ~LaneMask; in addVRegDefDeps()
476 V2SU.LaneMask = OverlapMask; in addVRegDefDeps()
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| H A D | LiveIntervals.cpp | 374 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
430 assert(LaneMask.any() && in extendSegmentsToUses()
560 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
773 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
1001 if ((S.LaneMask & LaneMask).none()) in updateAllRanges()
1003 updateRange(S, Reg, S.LaneMask); in updateAllRanges()
1030 if (LaneMask.any()) in updateRange()
1031 dbgs() << " L" << PrintLaneMask(LaneMask); in updateRange()
1040 handleMoveUp(LR, Reg, LaneMask); in updateRange()
1396 if (SubReg != 0 && LaneMask.any() in findLastUseBefore()
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| H A D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
187 if ((SR.LaneMask & LaneMask).none()) in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
232 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands()
285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
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| H A D | RegisterCoalescer.cpp | 909 MaskA |= SA.LaneMask; in removeCopyByCommutingDef()
928 if ((SB.LaneMask & MaskA).any()) in removeCopyByCommutingDef()
1327 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1362 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1505 if ((SR.LaneMask & SrcMask).none()) in eliminateUndefCopy()
1601 if ((S.LaneMask & Mask).none()) in addUndefFlag()
2146 const LaneBitmask LaneMask; member in __anone68f6e4f0311::JoinVals
2309 : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask), in JoinVals()
2400 if ((SMask & LaneMask).none()) in followCopyChain()
3036 ShrinkMask |= S.LaneMask; in pruneSubRegValues()
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| H A D | MachineBasicBlock.cpp | 391 if (!LI.LaneMask.all()) in print()
392 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print()
439 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
445 I->LaneMask &= ~LaneMask; in removeLiveIn()
446 if (I->LaneMask.none()) in removeLiveIn()
457 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn()
460 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
474 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
476 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
478 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
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| H A D | SplitKit.cpp | 411 if (S.LaneMask == LM) in getSubRangeForMask()
452 if ((S.LaneMask & LM).any()) in addDeadDef()
531 DestLI.refineSubRanges(Allocator, LaneMask, in buildSingleSubRegCopy()
542 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { in buildCopy()
568 if (SubRegMask == LaneMask) { in buildCopy()
574 if ((SubRegMask & ~LaneMask).any()) in buildCopy()
656 LaneBitmask LaneMask; in defFromParent() local
658 LaneMask = LaneBitmask::getNone(); in defFromParent()
660 LaneMask |= S.LaneMask; in defFromParent()
662 LaneMask = LaneBitmask::getAll(); in defFromParent()
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| H A D | VirtRegMap.cpp | 294 LaneBitmask LaneMask; in addLiveInsForSubRanges() local
303 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
305 if (LaneMask.none()) in addLiveInsForSubRanges()
308 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
370 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
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| H A D | LiveInterval.cpp | 885 LaneBitmask ToApply = LaneMask; in refineSubRanges()
887 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
888 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
899 SR.LaneMask = SRMask & ~Matching; in refineSubRanges()
921 LaneBitmask LaneMask, in computeSubRangeUndefs() argument
926 assert((VRegMask & LaneMask).any()); in computeSubRangeUndefs()
935 if ((UndefMask & LaneMask).any()) { in computeSubRangeUndefs()
985 OS << " L" << PrintLaneMask(LaneMask) << ' ' in print()
1038 assert((Mask & SR.LaneMask).none()); in verify()
1039 Mask |= SR.LaneMask; in verify()
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| H A D | LiveRangeEdit.cpp | 50 LI.createSubRange(Alloc, S.LaneMask); in createEmptyIntervalFrom()
250 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill() local
252 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
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| H A D | LiveRangeCalc.h | 174 void extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask,
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIFormMemoryClauses.cpp | 65 void forAllLanes(unsigned Reg, LaneBitmask LaneMask, Callable Func) const;
143 void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask, in forAllLanes() argument
145 if (LaneMask.all() || TargetRegisterInfo::isPhysicalRegister(Reg) || in forAllLanes()
146 LaneMask == MRI->getMaxLaneMaskForVReg(Reg)) { in forAllLanes()
160 if (SubRegMask == LaneMask) { in forAllLanes()
165 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) in forAllLanes()
183 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) in forAllLanes()
187 LaneMask &= ~SubRegMask; in forAllLanes()
188 if (LaneMask.none()) in forAllLanes()
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| H A D | GCNRegPressure.cpp | 243 I->LaneMask |= UsedMask; in collectVirtualRegUses()
262 LiveMask |= S.LaneMask; in getLiveLaneMask()
322 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); in recede()
346 LiveMask |= U.LaneMask; in recede()
382 It.second &= ~S.LaneMask; in advanceBeforeNext()
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| /freebsd-12.1/contrib/llvm/include/llvm/MC/ |
| H A D | LaneBitmask.h | 94 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument
95 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask()
96 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | RDFRegisters.cpp | 38 if (RC->LaneMask != RI.RegClass->LaneMask) { in PhysicalRegisterInfo()
68 UI.Mask = RC->LaneMask; in PhysicalRegisterInfo()
173 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) in aliasRM()
233 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
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| H A D | RDFCopy.cpp | 125 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) in run()
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| H A D | HexagonBlockRanges.cpp | 241 if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) { in getLiveIns()
247 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 108 if (LaneMask.any()) in computeLaneMask()
109 return LaneMask; in computeLaneMask()
112 LaneMask = LaneBitmask::getAll(); in computeLaneMask()
119 LaneMask = M; in computeLaneMask()
120 return LaneMask; in computeLaneMask()
1469 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks()
1526 LaneBitmask LaneMask; in computeSubRegLaneMasks() local
1530 LaneMask |= SubRegIndex.LaneMask; in computeSubRegLaneMasks()
1535 if (LaneMask.none()) in computeSubRegLaneMasks()
1538 RegClass.LaneMask = LaneMask; in computeSubRegLaneMasks()
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