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Searched refs:IsAnd (Results 1 – 4 of 4) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp445 ICmpInst *LHS, ICmpInst *RHS, bool IsAnd, in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed() argument
472 ICmpInst::Predicate NewCC = IsAnd ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_NE; in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed()
546 return ConstantInt::get(LHS->getType(), !IsAnd); in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed()
568 return ConstantInt::get(LHS->getType(), !IsAnd); in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed()
575 ICmpInst *LHS, ICmpInst *RHS, bool IsAnd, in foldLogOpOfMaskedICmpsAsymmetric() argument
587 if (!IsAnd) { in foldLogOpOfMaskedICmpsAsymmetric()
593 LHS, RHS, IsAnd, A, B, C, D, E, in foldLogOpOfMaskedICmpsAsymmetric()
599 RHS, LHS, IsAnd, A, D, E, B, C, in foldLogOpOfMaskedICmpsAsymmetric()
626 LHS, RHS, IsAnd, A, B, C, D, E, PredL, PredR, LHSMask, RHSMask, in foldLogOpOfMaskedICmps()
645 if (!IsAnd) { in foldLogOpOfMaskedICmps()
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H A DInstCombineInternal.h588 Value *foldLogicOfFCmps(FCmpInst *LHS, FCmpInst *RHS, bool IsAnd);
/freebsd-12.1/contrib/llvm/lib/Analysis/
H A DInstructionSimplify.cpp1413 return IsAnd ? UnsignedICmp : ZeroICmp; in simplifyUnsignedRangeCheck()
1417 if (UnsignedPred == ICmpInst::ICMP_UGE && !IsAnd) { in simplifyUnsignedRangeCheck()
1425 IsAnd) in simplifyUnsignedRangeCheck()
1501 if (IsAnd && Range0.intersectWith(Range1).isEmptySet()) in simplifyAndOrOfICmpsWithConstants()
1506 if (!IsAnd && Range0.unionWith(Range1).isFullSet()) in simplifyAndOrOfICmpsWithConstants()
1515 return IsAnd ? Cmp1 : Cmp0; in simplifyAndOrOfICmpsWithConstants()
1517 return IsAnd ? Cmp0 : Cmp1; in simplifyAndOrOfICmpsWithConstants()
1523 bool IsAnd) { in simplifyAndOrOfICmpsWithZero() argument
1529 if ((IsAnd && P0 != ICmpInst::ICMP_NE) || (!IsAnd && P1 != ICmpInst::ICMP_EQ)) in simplifyAndOrOfICmpsWithZero()
1758 V = IsAnd ? simplifyAndOfICmps(ICmp0, ICmp1, Q.IIQ) in simplifyAndOrOfCmps()
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/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp428 SDValue foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
3982 SDValue DAGCombiner::foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1, in foldLogicOfSetCCs() argument
4014 bool AndEqZero = IsAnd && CC1 == ISD::SETEQ && IsZero; in foldLogicOfSetCCs()
4016 bool AndGtNeg1 = IsAnd && CC1 == ISD::SETGT && IsNeg1; in foldLogicOfSetCCs()
4018 bool OrNeZero = !IsAnd && CC1 == ISD::SETNE && IsZero; in foldLogicOfSetCCs()
4020 bool OrLtZero = !IsAnd && CC1 == ISD::SETLT && IsZero; in foldLogicOfSetCCs()
4033 bool AndEqNeg1 = IsAnd && CC1 == ISD::SETEQ && IsNeg1; in foldLogicOfSetCCs()
4035 bool AndLtZero = IsAnd && CC1 == ISD::SETLT && IsZero; in foldLogicOfSetCCs()
4037 bool OrNeNeg1 = !IsAnd && CC1 == ISD::SETNE && IsNeg1; in foldLogicOfSetCCs()
4039 bool OrGtNeg1 = !IsAnd && CC1 == ISD::SETGT && IsNeg1; in foldLogicOfSetCCs()
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