Searched refs:InstDesc (Results 1 – 5 of 5) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Analysis/ |
| H A D | IVDescriptors.cpp | 454 RecurrenceDescriptor::InstDesc
472 return InstDesc(false, I); in isMinMaxSelectCmpPattern()
475 return InstDesc(false, I); in isMinMaxSelectCmpPattern()
477 return InstDesc(false, I); in isMinMaxSelectCmpPattern()
500 return InstDesc(false, I); in isMinMaxSelectCmpPattern()
512 RecurrenceDescriptor::InstDesc
517 return InstDesc(false, I); in isConditionalRdxPattern()
522 return InstDesc(false, I); in isConditionalRdxPattern()
530 return InstDesc(false, I); in isConditionalRdxPattern()
536 return InstDesc(false, I); in isConditionalRdxPattern()
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| /freebsd-12.1/contrib/llvm/include/llvm/Analysis/ |
| H A D | IVDescriptors.h | 101 class InstDesc {
103 InstDesc(bool IsRecur, Instruction *I, Instruction *UAI = nullptr)
107 InstDesc(Instruction *I, MinMaxRecurrenceKind K, Instruction *UAI = nullptr)
138 static InstDesc isRecurrenceInstr(Instruction *I, RecurrenceKind Kind,
139 InstDesc &Prev, bool HasFunNoNaNAttr);
152 static InstDesc isMinMaxSelectCmpPattern(Instruction *I, InstDesc &Prev);
156 static InstDesc isConditionalRdxPattern(RecurrenceKind Kind, Instruction *I);
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 161 bool shouldReplaceInst(MachineFunction *MF, const MCInstrDesc *InstDesc,
219 shouldReplaceInst(MachineFunction *MF, const MCInstrDesc *InstDesc, in shouldReplaceInst() argument
224 auto InstID = std::make_pair(InstDesc->getOpcode(), Subtarget); in shouldReplaceInst()
228 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst()
256 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3417 const MCInstrDesc &InstDesc = MI.getDesc(); in isOperandLegal() local
3418 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpIdx]; in isOperandLegal()
3436 usesConstantBus(MRI, Op, InstDesc.OpInfo[i])) { in isOperandLegal()
3439 } else if (InstDesc.OpInfo[i].OperandType == AMDGPU::OPERAND_KIMM32) { in isOperandLegal()
4635 const MCInstrDesc &InstDesc = get(Opcode); in splitScalar64BitUnaryOp() local
4759 const MCInstrDesc &InstDesc = get(Opcode); in splitScalar64BitBinaryOp() local
4785 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0) in splitScalar64BitBinaryOp()
4790 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1) in splitScalar64BitBinaryOp()
4863 const MCInstrDesc &InstDesc = get(AMDGPU::V_BCNT_U32_B32_e64); in splitScalar64BitBCNT() local
4878 BuildMI(MBB, MII, DL, InstDesc, MidReg).add(SrcRegSub0).addImm(0); in splitScalar64BitBCNT()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1396 const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode()); in addLiteralImmOperand() local
1399 assert(AMDGPU::isSISrcOperand(InstDesc, OpNum)); in addLiteralImmOperand()
1402 assert(AMDGPU::isSISrcFPOperand(InstDesc, OpNum)); in addLiteralImmOperand()
1403 const unsigned Size = Imm.IsFPImm ? sizeof(double) : getOperandSize(InstDesc, OpNum); in addLiteralImmOperand()
1408 uint8_t OpTy = InstDesc.OpInfo[OpNum].OperandType; in addLiteralImmOperand()
1423 if (AMDGPU::isSISrcFPOperand(InstDesc, OpNum)) { // Expected 64-bit fp operand in addLiteralImmOperand()
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