| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 380 unsigned Incr = I->getOperand(2).getReg(); in expandAtomicBinOpSubword() local
412 .addReg(Incr); in expandAtomicBinOpSubword()
424 .addReg(Incr); in expandAtomicBinOpSubword()
431 .addReg(Incr) in expandAtomicBinOpSubword()
519 unsigned Incr = I->getOperand(2).getReg(); in expandAtomicBinOp() local
595 assert((OldVal != Incr) && "Clobbered the wrong reg!"); in expandAtomicBinOp()
597 BuildMI(loopMBB, DL, TII->get(Opcode), Scratch).addReg(OldVal).addReg(Incr); in expandAtomicBinOp()
601 BuildMI(loopMBB, DL, TII->get(AND), Scratch).addReg(OldVal).addReg(Incr); in expandAtomicBinOp()
605 BuildMI(loopMBB, DL, TII->get(OR), Scratch).addReg(Incr).addReg(ZERO); in expandAtomicBinOp()
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| H A D | MipsISelLowering.cpp | 1469 unsigned Incr = MI.getOperand(2).getReg(); in emitAtomicBinary() local
1510 unsigned IncrCopy = RegInfo.createVirtualRegister(RegInfo.getRegClass(Incr)); in emitAtomicBinary()
1512 BuildMI(*BB, II, DL, TII->get(Mips::COPY), IncrCopy).addReg(Incr); in emitAtomicBinary()
1573 unsigned Incr = MI.getOperand(2).getReg(); in emitAtomicBinaryPartword() local
1678 BuildMI(BB, DL, TII->get(Mips::SLLV), Incr2).addReg(Incr).addReg(ShiftAmt); in emitAtomicBinaryPartword()
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| /freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | IndVarSimplify.cpp | 300 auto *Incr = dyn_cast<BinaryOperator>(PN->getIncomingValue(BackEdge)); in handleFloatingPointIV() local
301 if (Incr == nullptr || Incr->getOpcode() != Instruction::FAdd) return false; in handleFloatingPointIV()
305 ConstantFP *IncValueVal = dyn_cast<ConstantFP>(Incr->getOperand(1)); in handleFloatingPointIV()
307 if (IncValueVal == nullptr || Incr->getOperand(0) != PN || in handleFloatingPointIV()
313 Value::user_iterator IncrUse = Incr->user_begin(); in handleFloatingPointIV()
315 if (IncrUse == Incr->user_end()) return false; in handleFloatingPointIV()
317 if (IncrUse != Incr->user_end()) return false; in handleFloatingPointIV()
444 Incr->getName()+".int", Incr); in handleFloatingPointIV()
462 Incr->replaceAllUsesWith(UndefValue::get(Incr->getType())); in handleFloatingPointIV()
463 RecursivelyDeleteTriviallyDeadInstructions(Incr, TLI); in handleFloatingPointIV()
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| H A D | LoopStrengthReduce.cpp | 2115 BinaryOperator *Incr = in OptimizeShadowIV() local
2117 if (!Incr) continue; in OptimizeShadowIV()
2118 if (Incr->getOpcode() != Instruction::Add in OptimizeShadowIV()
2119 && Incr->getOpcode() != Instruction::Sub) in OptimizeShadowIV()
2124 if (Incr->getOperand(0) == PH) in OptimizeShadowIV()
2125 C = dyn_cast<ConstantInt>(Incr->getOperand(1)); in OptimizeShadowIV()
2126 else if (Incr->getOperand(1) == PH) in OptimizeShadowIV()
2127 C = dyn_cast<ConstantInt>(Incr->getOperand(0)); in OptimizeShadowIV()
2143 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ? in OptimizeShadowIV()
2145 NewPH, CFP, "IV.S.next.", Incr); in OptimizeShadowIV()
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| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 128 IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr,
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| H A D | RISCVISelLowering.cpp | 1755 IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
1776 {AlignedAddr, Incr, Mask, SextShamt, Ordering}); in emitMaskedAtomicRMWIntrinsic()
1779 return Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering}); in emitMaskedAtomicRMWIntrinsic()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 529 int Incr; in updateOffset() local
530 if (!HII->getIncrementValue(MJ, Incr)) in updateOffset()
534 if (!HII->isValidOffset(MI.getOpcode(), Offset+Incr, HRI)) in updateOffset()
537 MI.getOperand(OPI).setImm(Offset + Incr); in updateOffset()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfUnit.cpp | 498 int Incr = (LittleEndian ? 1 : -1); in addConstantFPValue() local
503 for (; Start != Stop; Start += Incr) in addConstantFPValue()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 2280 int SubReg = 0, End = NumRegs, Incr = 1; in copyPhysRegTuple() local
2284 Incr = -1; in copyPhysRegTuple()
2287 for (; SubReg != End; SubReg += Incr) { in copyPhysRegTuple()
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| /freebsd-12.1/contrib/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 870 int incrementUnscheduledDeps(int Incr) { in incrementUnscheduledDeps()
871 UnscheduledDeps += Incr; in incrementUnscheduledDeps()
872 return FirstInBundle->UnscheduledDepsInBundle += Incr; in incrementUnscheduledDeps()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1619 Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
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| /freebsd-12.1/contrib/binutils/config/ |
| H A D | ChangeLog | 530 * acinclude.m4: Updated for Incr Tcl 3.0.
|