Home
last modified time | relevance | path

Searched refs:HalfVT (Results 1 – 12 of 12) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DValueTypes.h333 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT() local
334 if (HalfVT.getSizeInBits() * 2 >= EVTSize) in getHalfSizedIntegerVT()
335 return HalfVT; in getHalfSizedIntegerVT()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1580 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); in LowerUDIVREM64() local
1582 SDValue One = DAG.getConstant(1, DL, HalfVT); in LowerUDIVREM64()
1583 SDValue Zero = DAG.getConstant(0, DL, HalfVT); in LowerUDIVREM64()
1597 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64()
1636 SDVTList HalfCarryVT = DAG.getVTList(HalfVT, MVT::i1); in LowerUDIVREM64()
1751 const unsigned halfBitWidth = HalfVT.getSizeInBits(); in LowerUDIVREM64()
1755 SDValue POS = DAG.getConstant(bitPos, DL, HalfVT); in LowerUDIVREM64()
1758 HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, One); in LowerUDIVREM64()
1766 SDValue BIT = DAG.getConstant(1ULL << bitPos, DL, HalfVT); in LowerUDIVREM64()
1916 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); in LowerSDIVREM() local
[all …]
H A DSIISelLowering.cpp4432 EVT HalfVT = MVT::getVectorVT(VT.getVectorElementType().getSimpleVT(), 2); in lowerBUILD_VECTOR() local
4436 SDValue Lo = DAG.getBuildVector(HalfVT, SL, in lowerBUILD_VECTOR()
4438 SDValue Hi = DAG.getBuildVector(HalfVT, SL, in lowerBUILD_VECTOR()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp364 MVT HalfVT = scaleVectorType(VT); in interleave8bitStride4() local
382 createUnpackShuffleMask<uint32_t>(HalfVT, MaskLowTemp, true, false); in interleave8bitStride4()
383 createUnpackShuffleMask<uint32_t>(HalfVT, MaskHighTemp, false, false); in interleave8bitStride4()
H A DX86ISelLowering.cpp9266 SDValue Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerAVXCONCAT_VECTORS()
9268 SDValue Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerAVXCONCAT_VECTORS()
9397 SDValue Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, in LowerCONCAT_VECTORSvXi1()
14373 return DAG.getUNDEF(HalfVT); in lowerVectorShuffleWithUndefHalf()
18009 MVT HalfVT = MVT::getVectorVT(VT.getVectorElementType(), in LowerAVXExtend() local
18018 OpHi = DAG.getBitcast(HalfVT, OpHi); in LowerAVXExtend()
20348 MVT HalfVT = MVT::getVectorVT(SVT, HalfNumElts); in LowerEXTEND_VECTOR_INREG() local
20355 SDValue Lo = DAG.getNode(Opc, dl, HalfVT, In); in LowerEXTEND_VECTOR_INREG()
20357 Hi = DAG.getNode(Opc, dl, HalfVT, Hi); in LowerEXTEND_VECTOR_INREG()
20449 MVT HalfVT = MVT::getVectorVT(VT.getVectorElementType(), in LowerSIGN_EXTEND() local
[all …]
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.cpp1099 EVT HalfVT = in SplitInteger() local
1101 SplitInteger(Op, HalfVT, HalfVT, Lo, Hi); in SplitInteger()
H A DDAGCombiner.cpp4163 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), Size / 2); in visitANDLike() local
4169 TLI.isNarrowingProfitable(VT, HalfVT) && in visitANDLike()
4170 TLI.isTypeDesirableForOp(ISD::AND, HalfVT) && in visitANDLike()
4171 TLI.isTypeDesirableForOp(ISD::SRL, HalfVT) && in visitANDLike()
4172 TLI.isTruncateFree(VT, HalfVT) && in visitANDLike()
4173 TLI.isZExtFree(HalfVT, VT)) { in visitANDLike()
4183 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike()
4184 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, HalfVT, in visitANDLike()
4187 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); in visitANDLike()
4189 SDValue Shift = DAG.getNode(ISD::SRL, SL, HalfVT, Trunc, ShiftK); in visitANDLike()
[all …]
H A DLegalizeIntegerTypes.cpp2958 EVT HalfVT = LHSLow.getValueType() in ExpandIntRes_XMULO() local
2960 SDVTList VTHalfMulO = DAG.getVTList(HalfVT, BitVT); in ExpandIntRes_XMULO()
2963 SDValue HalfZero = DAG.getConstant(0, dl, HalfVT); in ExpandIntRes_XMULO()
H A DLegalizeVectorTypes.cpp2302 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, in SplitVecOp_TruncateHelper() local
2304 SDValue HalfLo = DAG.getNode(N->getOpcode(), DL, HalfVT, InLoVec); in SplitVecOp_TruncateHelper()
2305 SDValue HalfHi = DAG.getNode(N->getOpcode(), DL, HalfVT, InHiVec); in SplitVecOp_TruncateHelper()
H A DSelectionDAGBuilder.cpp225 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); in getCopyFromParts() local
229 PartVT, HalfVT, V); in getCopyFromParts()
231 RoundParts / 2, PartVT, HalfVT, V); in getCopyFromParts()
233 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
234 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
H A DTargetLowering.cpp1087 EVT HalfVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local
1088 unsigned HalfBitWidth = HalfVT.getScalarSizeInBits(); in SimplifyDemandedBits()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp10318 EVT HalfVT = in splitStores() local
10320 SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in splitStores()
10322 SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in splitStores()