Searched refs:FloatVT (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 63 EVT FloatVT; member
1426 EVT FloatVT = Value.getValueType(); in getSignAsIntValue() local
1427 unsigned NumBits = FloatVT.getSizeInBits(); in getSignAsIntValue()
1428 State.FloatVT = FloatVT; in getSignAsIntValue()
1459 unsigned ByteOffset = (FloatVT.getSizeInBits() / 8) - 1; in getSignAsIntValue()
1484 return DAG.getLoad(State.FloatVT, DL, Chain, State.FloatPtr, in modifySignAsInt()
1503 EVT FloatVT = Mag.getValueType(); in ExpandFCOPYSIGN() local
1504 if (TLI.isOperationLegalOrCustom(ISD::FABS, FloatVT) && in ExpandFCOPYSIGN()
1505 TLI.isOperationLegalOrCustom(ISD::FNEG, FloatVT)) { in ExpandFCOPYSIGN()
1549 EVT FloatVT = Value.getValueType(); in ExpandFABS() local
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 11384 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, NumElts); in PerformBUILD_VECTORCombine() local
11385 SDValue BV = DAG.getBuildVector(FloatVT, dl, Ops); in PerformBUILD_VECTORCombine()
11495 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, in PerformInsertEltCombine() local
11497 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
11502 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
12061 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, in PerformSTORECombine() local
12063 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 553 class fixedpoint_i32<ValueType FloatVT>
554 : Operand<FloatVT>,
555 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<32>", [fpimm, ld]> {
561 class fixedpoint_i64<ValueType FloatVT>
562 : Operand<FloatVT>,
563 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<64>", [fpimm, ld]> {
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