Searched refs:FSHL (Results 1 – 13 of 13) sorted by relevance
410 SHL, SRA, SRL, ROTL, ROTR, FSHL, FSHR, enumerator
2096 { ISD::FSHL, MVT::i64, 4 } in getIntrinsicInstrCost()2105 { ISD::FSHL, MVT::i32, 4 }, in getIntrinsicInstrCost()2106 { ISD::FSHL, MVT::i16, 4 }, in getIntrinsicInstrCost()2107 { ISD::FSHL, MVT::i8, 4 } in getIntrinsicInstrCost()2115 ISD = ISD::FSHL; in getIntrinsicInstrCost()2121 ISD = ISD::FSHL; in getIntrinsicInstrCost()
199 for (auto ShiftOp : {ISD::FSHL, ISD::FSHR}) { in X86TargetLowering()1544 setOperationAction(ISD::FSHL, VT, Custom); in X86TargetLowering()1725 setOperationAction(ISD::FSHL, MVT::v32i16, Custom); in X86TargetLowering()1779 setOperationAction(ISD::FSHL, VT, Custom); in X86TargetLowering()17218 Tmp2 = DAG.getNode(ISD::FSHL, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftParts()17248 assert((Op.getOpcode() == ISD::FSHL || Op.getOpcode() == ISD::FSHR) && in LowerFunnelShift()26210 case ISD::FSHL: in LowerOperation()
361 case ISD::FSHL: in LegalizeOp()772 case ISD::FSHL: in Expand()
240 case ISD::FSHL: return "fshl"; in getOperationName()
1179 case ISD::FSHL: in LegalizeOp()3277 case ISD::FSHL: in ExpandNode()
2709 case ISD::FSHL: in computeKnownBits()2718 Known = computeKnownBits(Op.getOperand(Opcode == ISD::FSHL ? 0 : 1), in computeKnownBits()2727 if (Opcode == ISD::FSHL) { in computeKnownBits()
4234 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift()
1526 case ISD::FSHL: in visit()7072 bool IsFSHL = N->getOpcode() == ISD::FSHL; in visitFunnelShift()
5767 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall()
613 setOperationAction(ISD::FSHL, VT, Expand); in initActions()
1362 setOperationAction(ISD::FSHL, MVT::i32, Legal); in HexagonTargetLowering()1363 setOperationAction(ISD::FSHL, MVT::i64, Legal); in HexagonTargetLowering()
359 def fshl : SDNode<"ISD::FSHL" , SDTIntShiftDOp>;