Searched refs:ExtraVT (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 552 EVT ExtraVT = EVT::getIntegerVT(*DAG.getContext(), ExtraWidth); in LegalizeStoreOps() local
573 ST->getPointerInfo().getWithOffset(IncrementSize), ExtraVT, in LegalizeStoreOps()
593 ST->getPointerInfo().getWithOffset(IncrementSize), ExtraVT, in LegalizeStoreOps()
766 EVT ExtraVT = EVT::getIntegerVT(*DAG.getContext(), ExtraWidth); in LegalizeLoadOps() local
785 ExtraVT, MinAlign(Alignment, IncrementSize), MMOFlags, in LegalizeLoadOps()
816 ExtraVT, MinAlign(Alignment, IncrementSize), MMOFlags, in LegalizeLoadOps()
2815 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode() local
2825 if (ExtraVT.getSizeInBits() == 1) { in ExpandNode()
2838 ExtraVT.getScalarSizeInBits(); in ExpandNode()
2853 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode() local
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2684 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG() local
2698 SDValue VTOp = DAG.getValueType(ExtraVT.getScalarType()); in LowerSIGN_EXTEND_INREG()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 39060 EVT ExtraVT = cast<VTSDNode>(N1)->getVT(); in combineSextInRegCmov() local
39062 if (ExtraVT != MVT::i16) in combineSextInRegCmov()
39104 EVT ExtraVT = cast<VTSDNode>(N1)->getVT(); in combineSignExtendInReg() local
39122 if (N00.getValueType() == MVT::v4i32 && ExtraVT.getSizeInBits() < 128) { in combineSignExtendInReg()
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