| /freebsd-12.1/contrib/llvm/include/llvm/ADT/ |
| H A D | DenseSet.h | 70 DenseSetImpl(std::initializer_list<ValueT> Elems) in DenseSetImpl() argument
71 : DenseSetImpl(PowerOf2Ceil(Elems.size())) { in DenseSetImpl()
72 insert(Elems.begin(), Elems.end()); in DenseSetImpl()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 344 const unsigned Elems = Candidates.size(); in CreateParallelMACPairs() local
346 if (Elems < 2) in CreateParallelMACPairs()
400 for (unsigned i = 0; i < Elems; ++i) { in CreateParallelMACPairs()
405 for (unsigned j = 0; j < Elems; ++j) { in CreateParallelMACPairs()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1055 SmallVector<SDValue,8> Elems; in LowerHvxConcatVectors() local
1057 DAG.ExtractVectorElements(V, Elems); in LowerHvxConcatVectors()
1063 for (unsigned i = 0, e = Elems.size(); i != e; ++i) { in LowerHvxConcatVectors()
1064 SDValue V = Elems[i]; in LowerHvxConcatVectors()
1069 Elems[i] = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NTy, in LowerHvxConcatVectors()
1077 Elems[i] = DAG.getSExtOrTrunc(V, dl, NTy); in LowerHvxConcatVectors()
1079 Elems[i] = DAG.getUNDEF(NTy); in LowerHvxConcatVectors()
1084 return DAG.getBuildVector(VecTy, dl, Elems); in LowerHvxConcatVectors()
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| H A D | HexagonISelDAGToDAGHVX.cpp | 1992 SmallVector<SDValue, 128> Elems; in getVectorConstant() local
1994 Elems.push_back(DAG.getConstant(C, dl, MVT::i8)); in getVectorConstant()
1996 SDValue BV = DAG.getBuildVector(VecTy, dl, Elems); in getVectorConstant()
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| /freebsd-12.1/contrib/llvm/tools/clang/include/clang/Analysis/Analyses/ |
| H A D | ThreadSafetyTraverse.h | 151 Container(CopyReducerBase &S, unsigned N) : Elems(S.Arena, N) {} in Container()
154 void push_back(T E) { Elems.push_back(E); } in push_back()
156 SimpleArray<T> Elems; variable
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4395 for (auto Elem : Elems) { in buildVector()
4424 for (auto Elem : Elems) in buildVector()
4432 return joinDwords(DAG, DL, Elems[0], Elems[1]); in buildVector()
4436 return buildMergeScalars(DAG, DL, VT, Elems[0], Elems[1]); in buildVector()
4446 SDValue Op01 = buildMergeScalars(DAG, DL, VT, Elems[0], Elems[1]); in buildVector()
4447 SDValue Op23 = buildMergeScalars(DAG, DL, VT, Elems[2], Elems[3]); in buildVector()
4469 SDValue Elem = Elems[I]; in buildVector()
4499 SDNode *Ld = Elems[I].getNode(); in buildVector()
4511 bool Def1 = !Elems[I1].isUndef(); in buildVector()
4512 bool Def2 = !Elems[I2].isUndef(); in buildVector()
[all …]
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | RegisterInfoEmitter.cpp | 1373 ArrayRef<Record*> Elems = RC.getOrder(oi); in runTargetDesc() local
1374 if (!Elems.empty()) { in runTargetDesc()
1376 for (unsigned elem = 0; elem != Elems.size(); ++elem) in runTargetDesc()
1377 OS << (elem ? ", " : " ") << getQualifiedName(Elems[elem]); in runTargetDesc()
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| /freebsd-12.1/contrib/llvm/tools/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 8024 SmallVector<llvm::Type*, 8> Elems; member
8040 Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size)); in pad()
8046 Elems.push_back(llvm::Type::getInt64Ty(Context)); in pad()
8052 Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size)); in pad()
8066 Elems.push_back(Ty); in addFloat()
8092 Elems.push_back(ElemTy); in addStruct()
8104 return llvm::makeArrayRef(Elems) == Ty->elements(); in isUsableType()
8109 if (Elems.size() == 1) in getType()
8110 return Elems.front(); in getType()
8112 return llvm::StructType::get(Context, Elems); in getType()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12146 SDValue Input, uint64_t Elems, in addShuffleForVecExtend() argument
12158 ShuffleMask[CorrectElems & 0xF] = Elems & 0xF; in addShuffleForVecExtend()
12160 ShuffleMask[(CorrectElems & 0xF0) >> 4] = (Elems & 0xF0) >> 4; in addShuffleForVecExtend()
12162 Elems = Elems >> 8; in addShuffleForVecExtend()
12198 uint64_t Elems = 0; in combineBVOfVecSExt() local
12228 Elems = Elems << 8; in combineBVOfVecSExt()
12230 Elems |= Index; in combineBVOfVecSExt()
12265 if (Elems != CorrectElems) { in combineBVOfVecSExt()
12266 return addShuffleForVecExtend(N, DAG, Input, Elems, CorrectElems); in combineBVOfVecSExt()
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