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Searched refs:DstVT (Results 1 – 25 of 28) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.td1411 ValueType DstVT> {
1430 !if(!eq(DstVT.Size, 1),
1455 !if(!eq(DstVT.Size, 1),
1464 !if(!eq(DstVT.Size, 1),
1550 !if(!eq(DstVT.Size, 1),
1566 !if(!eq(DstVT.Size, 1),
1593 ValueType DstVT = i32> {
1595 !if(!eq(DstVT.Size, 1),
1626 !if(!eq(DstVT.Size, 64),
1662 field ValueType DstVT = ArgVT[0];
[all …]
H A DVOP3Instructions.td19 list<dag> ret3 = [(set P.DstVT:$vdst,
24 list<dag> ret2 = [(set P.DstVT:$vdst,
28 list<dag> ret1 = [(set P.DstVT:$vdst,
37 list<dag> ret3 = [(set P.DstVT:$vdst,
43 list<dag> ret2 = [(set P.DstVT:$vdst,
48 list<dag> ret1 = [(set P.DstVT:$vdst,
57 list<dag> ret3 = [(set P.DstVT:$vdst,
63 list<dag> ret2 = [(set P.DstVT:$vdst,
68 list<dag> ret1 = [(set P.DstVT:$vdst,
77 list<dag> ret3 = [(set P.DstVT:$vdst,
[all …]
H A DVOP1Instructions.td94 [(set P.DstVT:$vdst, (node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0,
98 [(set P.DstVT:$vdst, (node (P.Src0VT (VOP3OMods P.Src0VT:$src0,
100 [(set P.DstVT:$vdst, (node P.Src0VT:$src0))]
H A DVOP2Instructions.td115 [(set P.DstVT:$vdst,
121 [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))]);
H A DVOPInstructions.td606 !subst(P.DstRC, P.DstVT, tmp)));
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86FastISel.cpp1234 EVT DstVT = VA.getValVT(); in X86SelectRet() local
1236 if (SrcVT != DstVT) { in X86SelectRet()
1533 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt()
1551 if (DstVT == MVT::i64) { in X86SelectZExt()
1579 } else if (DstVT != MVT::i8) { in X86SelectZExt()
1592 if (!TLI.isTypeLegal(DstVT)) in X86SelectSExt()
1616 if (DstVT == MVT::i16) { in X86SelectSExt()
1625 } else if (DstVT != MVT::i8) { in X86SelectSExt()
2549 if (DstVT != MVT::i8 && DstVT != MVT::i1) in X86SelectTrunc()
3655 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
[all …]
H A DX86SelectionDAGInfo.cpp280 EVT DstVT = Dst.getValueType(); in EmitTargetCodeForMemcpy() local
284 DAG.getNode(ISD::ADD, dl, DstVT, Dst, in EmitTargetCodeForMemcpy()
286 DstVT)), in EmitTargetCodeForMemcpy()
H A DX86ISelLowering.cpp18126 if (SrcVT == DstVT) in truncateVectorWithPACK()
25371 if (DstVT != MVT::f64 && DstVT != MVT::i64 && in LowerBITCAST()
25393 if (DstVT == MVT::x86mmx) in LowerBITCAST()
25403 (DstVT.isVector() && DstVT.getSizeInBits()==64)) && in LowerBITCAST()
26950 if ((DstVT == MVT::v32i16 || DstVT == MVT::v64i8) && in ReplaceNodeResults()
26963 (DstVT != MVT::v2i32 && DstVT != MVT::v4i16 && DstVT != MVT::v8i8) || in ReplaceNodeResults()
30363 DstVT = MVT::getVectorVT(DstVT, NumDstElts); in matchUnaryVectorShuffle()
30444 SrcVT = DstVT = MaskVT; in matchUnaryVectorShuffle()
30622 DstVT = MaskVT; in matchBinaryVectorShuffle()
30635 SrcVT = DstVT = MaskVT; in matchBinaryVectorShuffle()
[all …]
H A DX86ISelDAGToDAG.cpp793 MVT DstVT = N->getSimpleValueType(0); in PreprocessISelDAG() local
796 if (SrcVT.isVector() || DstVT.isVector()) in PreprocessISelDAG()
804 bool DstIsSSE = X86Lowering->isScalarFPTypeInSSEReg(DstVT); in PreprocessISelDAG()
822 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'. in PreprocessISelDAG()
824 MemVT = SrcIsSSE ? SrcVT : DstVT; in PreprocessISelDAG()
833 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp, in PreprocessISelDAG()
H A DX86InstrAVX512.td7508 def rr : SI<opc, MRMSrcReg, (outs DstVT.FRC:$dst),
7509 (ins DstVT.FRC:$src1, SrcRC:$src),
7514 (ins DstVT.FRC:$src1, x86memop:$src),
7520 (ins DstVT.RC:$src1, SrcRC:$src2),
7522 [(set DstVT.RC:$dst,
7523 (OpNode (DstVT.VT DstVT.RC:$src1),
7531 [(set DstVT.RC:$dst,
7532 (OpNode (DstVT.VT DstVT.RC:$src1),
7546 [(set DstVT.RC:$dst,
7547 (OpNode (DstVT.VT DstVT.RC:$src1),
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h55 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
57 bool isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const override;
H A DRISCVISelLowering.cpp252 bool RISCVTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const { in isTruncateFree()
253 if (Subtarget.is64Bit() || SrcVT.isVector() || DstVT.isVector() || in isTruncateFree()
254 !SrcVT.isInteger() || !DstVT.isInteger()) in isTruncateFree()
257 unsigned DestBits = DstVT.getSizeInBits(); in isTruncateFree()
275 bool RISCVTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const { in isSExtCheaperThanZExt()
276 return Subtarget.is64Bit() && SrcVT == MVT::i32 && DstVT == MVT::i64; in isSExtCheaperThanZExt()
/freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp626 VectorType *DstVT = dyn_cast<VectorType>(BCI.getDestTy()); in visitBitCastInst() local
628 if (!DstVT || !SrcVT) in visitBitCastInst()
631 unsigned DstNumElems = DstVT->getNumElements(); in visitBitCastInst()
640 Res[I] = Builder.CreateBitCast(Op0[I], DstVT->getElementType(), in visitBitCastInst()
646 Type *MidTy = VectorType::get(DstVT->getElementType(), FanOut); in visitBitCastInst()
672 Res[ResI] = Builder.CreateBitCast(V, DstVT->getElementType(), in visitBitCastInst()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp4314 EVT DstVT = Node->getValueType(0); in expandFP_TO_SINT() local
4318 if (SrcVT != MVT::f32 || DstVT != MVT::i64) in expandFP_TO_SINT()
4351 R = DAG.getZExtOrTrunc(R, dl, DstVT); in expandFP_TO_SINT()
4355 DAG.getNode(ISD::SHL, dl, DstVT, R, in expandFP_TO_SINT()
4359 DAG.getNode(ISD::SRL, dl, DstVT, R, in expandFP_TO_SINT()
4379 EVT DstVT = Node->getValueType(0); in expandFP_TO_UINT() local
4384 if (DstVT.isVector() && (!isOperationLegalOrCustom(ISD::FP_TO_SINT, DstVT) || in expandFP_TO_UINT()
4415 SDValue Ofs = DAG.getSelect(dl, DstVT, Sel, DAG.getConstant(0, dl, DstVT), in expandFP_TO_UINT()
4440 EVT DstVT = Node->getValueType(0); in expandUINT_TO_FP() local
4448 if (DstVT.getScalarType() == MVT::f32) { in expandUINT_TO_FP()
[all …]
H A DFastISel.cpp1496 EVT DstVT = TLI.getValueType(DL, I->getType()); in selectCast() local
1498 if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other || in selectCast()
1499 !DstVT.isSimple()) in selectCast()
1504 if (!TLI.isTypeLegal(DstVT)) in selectCast()
1546 MVT DstVT = DstEVT.getSimpleVT(); in selectBitCast() local
1554 if (SrcVT == DstVT) { in selectBitCast()
1556 const TargetRegisterClass *DstClass = TLI.getRegClassFor(DstVT); in selectBitCast()
1567 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1891 EVT DstVT = TLI.getValueType(DL, I->getType()); in selectOperator() local
1892 if (DstVT.bitsGT(SrcVT)) in selectOperator()
[all …]
H A DLegalizeIntegerTypes.cpp3451 EVT DstVT = N->getValueType(0); in ExpandIntOp_SINT_TO_FP() local
3452 RTLIB::Libcall LC = RTLIB::getSINTTOFP(Op.getValueType(), DstVT); in ExpandIntOp_SINT_TO_FP()
3455 return TLI.makeLibCall(DAG, LC, DstVT, Op, true, SDLoc(N)).first; in ExpandIntOp_SINT_TO_FP()
3550 EVT DstVT = N->getValueType(0); in ExpandIntOp_UINT_TO_FP() local
3556 const fltSemantics &sem = DAG.EVTToAPFloatSemantics(DstVT); in ExpandIntOp_UINT_TO_FP()
3560 SDValue SignedConv = DAG.getNode(ISD::SINT_TO_FP, dl, DstVT, Op); in ExpandIntOp_UINT_TO_FP()
3610 ISD::EXTLOAD, dl, DstVT, DAG.getEntryNode(), FudgePtr, in ExpandIntOp_UINT_TO_FP()
3613 return DAG.getNode(ISD::FADD, dl, DstVT, SignedConv, Fudge); in ExpandIntOp_UINT_TO_FP()
3617 RTLIB::Libcall LC = RTLIB::getUINTTOFP(SrcVT, DstVT); in ExpandIntOp_UINT_TO_FP()
3620 return TLI.makeLibCall(DAG, LC, DstVT, Op, true, dl).first; in ExpandIntOp_UINT_TO_FP()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1070 MVT DstVT; in SelectIToFP() local
1072 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP()
1075 if (DstVT != MVT::f32 && DstVT != MVT::f64) in SelectIToFP()
1096 if (DstVT == MVT::f32) in SelectIToFP()
1141 if (DstVT == MVT::f32) in SelectIToFP()
1195 MVT DstVT, SrcVT; in SelectFPToI() local
1197 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI()
1200 if (DstVT != MVT::i32 && DstVT != MVT::i64) in SelectFPToI()
1204 if (DstVT == MVT::i64 && !IsSigned && in SelectFPToI()
1244 if (DstVT == MVT::i32) in SelectFPToI()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp418 auto DstVT = TLI->getValueType(DL, Dst); in getExtractWithExtendCost() local
424 if (!VecLT.second.isVector() || !TLI->isTypeLegal(DstVT)) in getExtractWithExtendCost()
429 if (DstVT.getSizeInBits() < SrcVT.getSizeInBits()) in getExtractWithExtendCost()
444 if (DstVT.getSizeInBits() != 64u || SrcVT.getSizeInBits() == 32u) in getExtractWithExtendCost()
H A DAArch64ISelDAGToDAG.cpp1102 EVT DstVT = N->getValueType(0); in tryIndexedLoad() local
1125 DstVT = MVT::i32; in tryIndexedLoad()
1129 if (DstVT == MVT::i64) in tryIndexedLoad()
1135 InsertTo64 = DstVT == MVT::i64; in tryIndexedLoad()
1138 DstVT = MVT::i32; in tryIndexedLoad()
1142 if (DstVT == MVT::i64) in tryIndexedLoad()
1148 InsertTo64 = DstVT == MVT::i64; in tryIndexedLoad()
1151 DstVT = MVT::i32; in tryIndexedLoad()
1170 SDNode *Res = CurDAG->getMachineNode(Opcode, dl, MVT::i64, DstVT, in tryIndexedLoad()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td3585 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3587 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3645 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3653 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3658 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3662 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3666 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3668 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3677 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3681 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
[all …]
H A DMipsFastISel.cpp1103 MVT DstVT, SrcVT; in selectFPToInt() local
1108 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt()
1111 if (DstVT != MVT::i32) in selectFPToInt()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1552 MVT DstVT; in SelectIToFP() local
1554 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP()
1586 unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT)); in SelectIToFP()
1597 MVT DstVT; in SelectFPToI() local
1599 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI()
1619 unsigned IntReg = ARMMoveToIntReg(DstVT, ResultReg); in SelectFPToI()
H A DARMISelLowering.h334 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
H A DARMISelLowering.cpp5082 EVT DstVT = BC->getValueType(0); in CombineVMOVDRRCandidateWithVecOp() local
5100 unsigned DstNumElt = DstVT.getVectorNumElements(); in CombineVMOVDRRCandidateWithVecOp()
5115 *DAG.getContext(), DstVT.getScalarType(), in CombineVMOVDRRCandidateWithVecOp()
5136 EVT DstVT = N->getValueType(0); in ExpandBITCAST() local
5139 if (SrcVT == MVT::f32 && DstVT == MVT::i32) { in ExpandBITCAST()
5160 if (SrcVT == MVT::i16 && DstVT == MVT::f16) { in ExpandBITCAST()
5177 if (SrcVT == MVT::f16 && DstVT == MVT::i16) { in ExpandBITCAST()
5207 if (!(SrcVT == MVT::i64 || DstVT == MVT::i64)) in ExpandBITCAST()
5221 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
13024 !DstVT.isInteger()) in isTruncateFree()
[all …]
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp1124 EVT DstVT = TLI.getValueType(DL, CI->getType()); in OptimizeNoopCopyExpression() local
1127 if (SrcVT.isInteger() != DstVT.isInteger()) in OptimizeNoopCopyExpression()
1132 if (SrcVT.bitsLT(DstVT)) return false; in OptimizeNoopCopyExpression()
1140 if (TLI.getTypeAction(CI->getContext(), DstVT) == in OptimizeNoopCopyExpression()
1142 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT); in OptimizeNoopCopyExpression()
1145 if (SrcVT != DstVT) in OptimizeNoopCopyExpression()

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