Searched refs:DPLL (Results 1 – 5 of 5) sorted by relevance
15 #define DPLL 3 macro
1055 reg = DPLL(pipe); in assert_pll()1455 reg = DPLL(pipe); in intel_enable_pll()1492 reg = DPLL(pipe); in intel_disable_pll()4380 POSTING_READ(DPLL(pipe)); in vlv_update_pll()4412 POSTING_READ(DPLL(pipe)); in vlv_update_pll()4424 POSTING_READ(DPLL(pipe)); in vlv_update_pll()4530 POSTING_READ(DPLL(pipe)); in i9xx_update_pll()4546 POSTING_READ(DPLL(pipe)); in i9xx_update_pll()4607 POSTING_READ(DPLL(pipe)); in i8xx_update_pll()4620 POSTING_READ(DPLL(pipe)); in i8xx_update_pll()[all …]
258 int dpll_reg = DPLL(pipe); in intel_dvo_mode_set()
929 #define DPLL(pipe) _PIPE(pipe, _DPLL_A, _DPLL_B) macro
216 * Fix the emac parent clock is DPLL instead of APLL.