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Searched refs:CondReg (Results 1 – 16 of 16) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86FlagsCopyLowering.cpp766 if (!CondReg && !InvCondReg) in getCondOrInverseInReg()
769 if (CondReg) in getCondOrInverseInReg()
770 return {CondReg, false}; in getCondOrInverseInReg()
820 if (!CondReg) in rewriteArithmetic()
830 .addReg(CondReg) in rewriteArithmetic()
846 unsigned CondReg; in rewriteCMov() local
848 std::tie(CondReg, Inverted) = in rewriteCMov()
871 unsigned CondReg; in rewriteCondJmp() local
980 if (!CondReg) in rewriteSetCarryExtended()
1034 if (!CondReg) in rewriteSetCC()
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H A DX86FastISel.cpp2117 unsigned CondReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local
2118 if (CondReg == 0) in X86FastEmitCMoveSelect()
2124 unsigned KCondReg = CondReg; in X86FastEmitCMoveSelect()
2125 CondReg = createResultReg(&X86::GR32RegClass); in X86FastEmitCMoveSelect()
2127 TII.get(TargetOpcode::COPY), CondReg) in X86FastEmitCMoveSelect()
2129 CondReg = fastEmitInst_extractsubreg(MVT::i8, CondReg, /*Kill=*/true, in X86FastEmitCMoveSelect()
2333 unsigned CondReg = getRegForValue(Cond); in X86FastEmitPseudoSelect() local
2334 if (CondReg == 0) in X86FastEmitPseudoSelect()
2340 unsigned KCondReg = CondReg; in X86FastEmitPseudoSelect()
2343 TII.get(TargetOpcode::COPY), CondReg) in X86FastEmitPseudoSelect()
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H A DX86InstructionSelector.cpp1405 const unsigned CondReg = I.getOperand(0).getReg(); in selectCondBranch() local
1410 .addReg(CondReg) in selectCondBranch()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIInsertSkips.cpp334 const unsigned CondReg = AMDGPU::VCC; in optimizeVccBranch() local
347 if (A->modifiesRegister(CondReg, TRI)) { in optimizeVccBranch()
348 if (!A->definesRegister(CondReg, TRI) || A->getOpcode() != And) in optimizeVccBranch()
352 ReadsCond |= A->readsRegister(CondReg, TRI); in optimizeVccBranch()
394 MI.killsRegister(CondReg, TRI)) in optimizeVccBranch()
409 MI.RemoveOperand(MI.findRegisterUseOperandIdx(CondReg, false /*Kill*/, TRI)); in optimizeVccBranch()
H A DSIOptimizeExecMaskingPreRA.cpp130 const unsigned CondReg = AMDGPU::VCC; in optimizeVcndVcmpPair() local
140 auto *And = TRI->findReachingDef(CondReg, AMDGPU::NoSubRegister, in optimizeVcndVcmpPair()
200 (CmpReg == CondReg && in optimizeVcndVcmpPair()
203 return MI.readsRegister(CondReg, TRI); }))) { in optimizeVcndVcmpPair()
H A DSIInstrInfo.cpp1735 static void preserveCondRegFlags(MachineOperand &CondReg, in preserveCondRegFlags() argument
1737 CondReg.setIsUndef(OrigCond.isUndef()); in preserveCondRegFlags()
1738 CondReg.setIsKill(OrigCond.isKill()); in preserveCondRegFlags()
1789 MachineOperand &CondReg = CondBr->getOperand(1); in insertBranch() local
1790 CondReg.setIsUndef(Cond[1].isUndef()); in insertBranch()
1791 CondReg.setIsKill(Cond[1].isKill()); in insertBranch()
H A DAMDGPUISelDAGToDAG.cpp1624 unsigned CondReg = UseSCCBr ? AMDGPU::SCC : AMDGPU::VCC; in SelectBRCOND() local
1647 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond); in SelectBRCOND()
H A DAMDGPUMachineCFGStructurizer.cpp1894 unsigned CondReg = Cond[0].getReg(); in ensureCondIsNotKilled() local
1895 for (auto UI = MRI->use_begin(CondReg), E = MRI->use_end(); UI != E; ++UI) { in ensureCondIsNotKilled()
H A DSIISelLowering.cpp2861 unsigned CondReg = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass); in emitLoadM0FromVGPRLoop() local
2880 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_CMP_EQ_U32_e64), CondReg) in emitLoadM0FromVGPRLoop()
2886 .addReg(CondReg, RegState::Kill); in emitLoadM0FromVGPRLoop()
2888 MRI.setSimpleHint(NewExec, CondReg); in emitLoadM0FromVGPRLoop()
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp876 unsigned CondReg = getRegForI1Value(Select->getCondition(), Not); in selectSelect() local
877 if (CondReg == 0) in selectSelect()
925 .addReg(CondReg); in selectSelect()
1266 unsigned CondReg = getRegForI1Value(Br->getCondition(), Not); in selectBr() local
1267 if (CondReg == 0) in selectBr()
1276 .addReg(CondReg); in selectBr()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstructionSelector.cpp598 const unsigned CondReg = I.getOperand(0).getReg(); in selectCompareBranch() local
600 MachineInstr *CCMI = MRI.getVRegDef(CondReg); in selectCompareBranch()
789 const unsigned CondReg = I.getOperand(0).getReg(); in select() local
802 .addUse(CondReg) in select()
811 .addUse(CondReg) in select()
1374 const unsigned CondReg = I.getOperand(1).getReg(); in select() local
1391 .addUse(CondReg) in select()
H A DAArch64FastISel.cpp2479 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
2480 if (!CondReg) in selectBranch()
2493 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
2494 if (CondReg == 0) in selectBranch()
2507 = constrainOperandRegClass(II, CondReg, II.getNumDefs()); in selectBranch()
2719 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
2720 if (!CondReg) in selectSelect()
2771 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
2772 if (!CondReg) in selectSelect()
2777 CondReg = constrainOperandRegClass(II, CondReg, 1); in selectSelect()
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/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp971 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
972 if (CondReg == 0) in selectBranch()
975 ZExtCondReg = emitIntExt(MVT::i1, CondReg, MVT::i32, true); in selectBranch()
1050 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
1052 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
1059 if (!emitIntExt(MVT::i1, CondReg, MVT::i32, ZExtCondReg, true)) in selectSelect()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp684 auto CondReg = MIB->getOperand(1).getReg(); in selectSelect() local
685 assert(validReg(MRI, CondReg, 1, ARM::GPRRegBankID) && in selectSelect()
688 .addUse(CondReg) in selectSelect()
H A DARMFastISel.cpp1634 unsigned CondReg = getRegForValue(I->getOperand(0)); in SelectSelect() local
1635 if (CondReg == 0) return false; in SelectSelect()
1661 CondReg = constrainOperandRegClass(TII.get(TstOpc), CondReg, 0); in SelectSelect()
1664 .addReg(CondReg) in SelectSelect()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp801 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch() local
804 CondReg, PPCPred)) in SelectBranch()
809 .addReg(CondReg).addMBB(TBB); in SelectBranch()