Home
last modified time | relevance | path

Searched refs:CompleteModel (Results 1 – 25 of 49) sorted by relevance

12

/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCSchedule.h302 bool CompleteModel; member
330 bool isComplete() const { return CompleteModel; } in isComplete()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMScheduleM3.td20 let CompleteModel = 0;
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonScheduleV62.td32 let CompleteModel = 0;
H A DHexagonScheduleV65.td35 let CompleteModel = 0;
H A DHexagonScheduleV66.td35 let CompleteModel = 0;
H A DHexagonScheduleV5.td41 let CompleteModel = 0;
H A DHexagonScheduleV55.td43 let CompleteModel = 0;
H A DHexagonScheduleV60.td76 let CompleteModel = 0;
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiSchedule.td37 let CompleteModel = 0;
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCScheduleA2.td166 let CompleteModel = 0;
H A DPPCScheduleG5.td125 let CompleteModel = 0;
H A DPPCScheduleE500.td277 let CompleteModel = 0;
H A DPPCScheduleE500mc.td332 let CompleteModel = 0;
H A DPPCScheduleP9.td42 let CompleteModel = 1;
H A DPPCScheduleE5500.td376 let CompleteModel = 0;
H A DPPCScheduleP7.td401 let CompleteModel = 0;
H A DPPCScheduleP8.td410 let CompleteModel = 0;
H A DPPCSchedule440.td597 let CompleteModel = 0;
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSISchedule.td49 let CompleteModel = 0;
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64SchedFalkor.td25 let CompleteModel = 1;
H A DAArch64SchedKryo.td29 let CompleteModel = 1;
H A DAArch64SchedThunderX.td27 let CompleteModel = 1;
H A DAArch64SchedA53.td28 let CompleteModel = 1;
/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp1343 bool CompleteModel = in EmitProcessorModels() local
1346 OS << " " << (CompleteModel ? "true" : "false") << ", // " in EmitProcessorModels()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSchedule.td100 bit CompleteModel = 1;
127 let CompleteModel = 0;

12